カテゴリー: MediaTek (MIPS)

WRC-1750GS/GSV

WRC-1750GHBKと一緒にTwitterにて投票を取ったところ、GHBKと同数で並んだため手を出すことにした機種。比較的安価な中古出品を見つけており、WRC-1750GHBK確保後少々迷ったが購入した。ちなみにWRC-1750GSVもヤフオクで非常に安い出品があり、衝動的に確保した。
弄っていくのでメモ。

Switch

zone WAN LAN
port
(WRC-1750GS/GSV)
INTERNET LAN4 LAN3 LAN2 LAN1
port
(MT7530)
port0 port1 port2 port3 port4

MAC

WRC-1750GS

  • LAN: BC:5C:4C:xx:xx:5B (Factory, 0xE000 (hex))
  • WAN: BC:5C:4C:xx:xx:5C (Factory, 0xE006 (hex))
  • 2.4G: BC:5C:4C:xx:xx:5D (Factory, 0x4 (hex))
  • 5G: BC:5C:4C:xx:xx:5E (Factory, 0x8004 (hex))

WRC-1750GSV

  • LAN: 04:AB:18:xx:xx:DB (Factory, 0xE000 (hex))
  • WAN: 04:AB:18:xx:xx:DC (Factory, 0xE006 (hex))
  • 2.4G: 04:AB:18:xx:xx:DD (Factory, 0x4 (hex))
  • 5G: 04:AB:18:xx:xx:DE (Factory, 0x8004 (hex))

U-Boot

  • help
    MT7621 # help
    ?       - alias for 'help'
    bootm   - boot application image from memory
    cp      - memory copy
    erase   - erase SPI FLASH memory
    go      - start application at address 'addr'
    help    - print online help
    httpboot- entering the backup mode.
    loadb   - load binary file over serial line (kermit mode)
    md      - memory display
    mdio   - Ralink PHY register R/W command !!
    mm      - memory modify (auto-incrementing)
    nm      - memory modify (constant address)
    printenv- print environment variables
    reset   - Perform RESET of the CPU
    rf      - read/write rf register
    saveenv - save environment variables to persistent storage
    setenv  - set environment variables
    spi     - spi command
    tftpboot- boot image via network using TFTP protocol
    version - print monitor version
    

  • version
    MT7621 # version
    
    U-Boot 1.1.3 (Aug 11 2017 - 22:15:36)
    

  • printenv
    WRC-1750GS:

    MT7621 # printenv
    bootcmd=tftp
    bootdelay=5
    baudrate=57600
    ethaddr="00:AA:BB:CC:DD:10"
    ipaddr=192.168.2.1
    serverip=192.168.2.2
    board_id=2017C2022132
    wlan0_guest_ssid=e-tomo-****5b
    wlan0_guest_key=********
    wlan0_ssid=elecom2g-****5b
    wlan1_ssid=elecom5g-****5b
    wlan0_key=************
    wlan1_key=************
    wps_pin=********
    hw_version=A1
    wlan0_domain=0x41
    model_id=WRC-1750GS
    stdin=serial
    stdout=serial
    stderr=serial
    ethact=Eth0 (10/100-M)
    
    Environment size: 419/4092 bytes
    

    WRC-1750GSV:

    MT7621 # printenv
    bootcmd=tftp
    bootdelay=5
    baudrate=57600
    ethaddr="00:AA:BB:CC:DD:10"
    ipaddr=192.168.2.1
    serverip=192.168.2.2
    board_id=2018A2901085
    wlan0_guest_ssid=e-tomo-****db
    wlan0_guest_key=********
    wlan0_ssid=elecom2g-****db
    wlan1_ssid=elecom5g-****db
    wlan0_key=************
    wlan1_key=************
    wps_pin=********
    hw_version=A1
    wlan0_domain=0x41
    model_id=WRC-1750GSV
    stdin=serial
    stdout=serial
    stderr=serial
    ethact=Eth0 (10/100-M)
    
    Environment size: 420/4092 bytes
    

  • 
    

  • 
    

  • 
    

Kernel

  • uname -a
    WRC-1750GS:

    root@WRC-1750GS:/# uname -a
    Linux WRC-1750GS 3.10.14+ #19 SMP Fri Aug 24 19:22:43 CST 2018 mips GNU/Linux
    

    WRC-1750GSV:

    root@WRC-1750GSV:/# uname -a
    Linux WRC-1750GSV 3.10.14 #1 SMP Thu Jun 6 15:05:42 CST 2019 mips GNU/Linux
    

  • cat /proc/version
    WRC-1750GS:

    root@WRC-1750GS:/# cat /proc/version
    Linux version 3.10.14+ (*****@ubuntu) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #19 SMP Fri Aug 24 19:22:43 CST 2018
    

    WRC-1750GSV:

    root@WRC-1750GSV:/# cat /proc/version
    Linux version 3.10.14 (*****@ubuntu) (gcc version 4.6.4 (OpenWrt/Linaro GCC 4.6-2013.05 r48067) ) #1 SMP Thu Jun 6 15:05:42 CST 2019
    

  • cat /proc/cpuinfo
    root@WRC-1750GS:/# cat /proc/cpuinfo
    system type             : MT7621
    machine                 : Unknown
    processor               : 0
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 1
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 2
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 3
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    

  • cat /proc/meminfo
    root@WRC-1750GS:/# cat /proc/meminfo
    MemTotal:         124024 kB
    MemFree:           62476 kB
    Buffers:            4924 kB
    Cached:            14880 kB
    SwapCached:            0 kB
    Active:             9368 kB
    Inactive:          13252 kB
    Active(anon):       2884 kB
    Inactive(anon):      208 kB
    Active(file):       6484 kB
    Inactive(file):    13044 kB
    Unevictable:           0 kB
    Mlocked:               0 kB
    SwapTotal:             0 kB
    SwapFree:              0 kB
    Dirty:                 0 kB
    Writeback:             0 kB
    AnonPages:          2772 kB
    Mapped:             2420 kB
    Shmem:               276 kB
    Slab:              19280 kB
    SReclaimable:       2168 kB
    SUnreclaim:        17112 kB
    KernelStack:         656 kB
    PageTables:          360 kB
    NFS_Unstable:          0 kB
    Bounce:                0 kB
    WritebackTmp:          0 kB
    CommitLimit:       62012 kB
    Committed_AS:       7696 kB
    VmallocTotal:    1048372 kB
    VmallocUsed:       16112 kB
    VmallocChunk:    1005524 kB
    

  • cat /proc/mtd
    WRC-1750GS:

    root@WRC-1750GS:/# cat /proc/mtd
    dev:    size   erasesize  name
    mtd0: 01000000 00010000 "ALL"
    mtd1: 00030000 00010000 "Bootloader"
    mtd2: 00010000 00010000 "Config"
    mtd3: 00010000 00010000 "Factory"
    mtd4: 00b00000 00010000 "firmware"
    mtd5: 00200000 00010000 "kernel"
    mtd6: 00900000 00010000 "rootfs"
    mtd7: 00380000 00010000 "tm_pattern"
    mtd8: 00080000 00010000 "tm_key"
    mtd9: 00030000 00010000 "art_block"
    mtd10: 00080000 00010000 "rootfs_data"
    

    WRC-1750GSV:

    root@WRC-1750GSV:/# cat /proc/mtd
    dev:    size   erasesize  name
    mtd0: 01000000 00010000 "ALL"
    mtd1: 00030000 00010000 "Bootloader"
    mtd2: 00010000 00010000 "Config"
    mtd3: 00010000 00010000 "Factory"
    mtd4: 00b00000 00010000 "firmware"
    mtd5: 00400000 00010000 "kernel"
    mtd6: 00700000 00010000 "rootfs"
    mtd7: 00380000 00010000 "tm_pattern"
    mtd8: 00080000 00010000 "tm_key"
    mtd9: 00030000 00010000 "nvram"
    mtd10: 00080000 00010000 "rootfs_data"
    

  • cat /sbin/mtk_led | head -n 10
    WRC-1750GS:

    root@WRC-1750GS:/# cat /sbin/mtk_led | head -n 10
    #!/bin/sh
    
    PWR_LED_R=16
    PWR_LED_G=7
    PWR_LED_B=8
    WPS_LED=15
    
    power_led_on_off() {
    
            if [ "$2" = "on" ]; then
    

    WRC-1750GSV:

    root@WRC-1750GSV:/# cat /sbin/mtk_led | head -n 10
    #!/bin/sh
    
    PWR_LED_R=16
    PWR_LED_G=7
    PWR_LED_B=8
    WPS_LED=15
    DBDC=$(uci -q get qcawifi.wlan0.dbdc)
    DBDC_2G_LED=3
    DBDC_5G_LED=4
    

  • switch vlan dump
    root@WRC-1750GS:/# switch vlan dump
      vid  fid  portmap    s-tag
        1    0  -1111-11       0
        2    0  1----1--       0
        3    0  invalid
        4    0  invalid
        5    0  invalid
        6    0  invalid
        7    0  invalid
        8    0  invalid
        9    0  invalid
       10    0  invalid
       11    0  invalid
       12    0  invalid
       13    0  invalid
       14    0  invalid
       15    0  invalid
       16    0  invalid
    

  • cat /etc/bulk/bulk | grep “C_Command1)” -A 10
    root@WRC-1750GS:/# cat /etc/bulk/bulk | grep "C_Command1)" -A 10
    C_Command1) # HW Mode
            # 44 = router 41 = extension 43 = repeater 42 = ap
            if [ "$(/sbin/gpio g 44 | sed 's/.*= //g')" = "0" ]; then
                    echo "Mode=Router"
            elif [ "$(/sbin/gpio g 43 | sed 's/.*= //g')" = "0" ]; then
                    echo "Mode=Repeater"
            elif [ "$(/sbin/gpio g 42 | sed 's/.*= //g')" = "0" ]; then
                    echo "Mode=AP"
            elif [ "$(/sbin/gpio g 41 | sed 's/.*= //g')" = "0" ]; then
                    echo "Mode=Extension"
            fi
    

  • 
    

  • 
    

  • bootlog (WRC-1750GS)
    -> WRC-1750GSV

    
    ===================================================================
                    MT7621   stage1 code 10:33:55 (ASIC)
                    CPU=500000000 HZ BUS=166666666 HZ
    ==================================================================
    Change MPLL source from XTAL to CR...
    do MEMPLL setting..
    MEMPLL Config : 0x11000000
    3PLL mode + External loopback
    === XTAL-40Mhz === DDR-1200Mhz ===
    PLL3 FB_DL: 0x9, 1/0 = 529/495 25000000
    PLL2 FB_DL: 0x12, 1/0 = 666/358 49000000
    PLL4 FB_DL: 0x16, 1/0 = 594/430 59000000
    do DDR setting..[01F40000]
    Apply DDR3 Setting...(use default AC)
              0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
          --------------------------------------------------------------------------------
    0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    1
    000E:|    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1
    000F:|    0    0    0    0    1    1    1    1    1    1    1    1    1    1    1    0
    0010:|    1    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0
    0011:|    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0
    0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    rank 0 coarse = 15
    rank 0 fine = 72
    B:|    0    0    0    0    0    0    0    0    0    1    1    1    0    0    0    0
    opt_dle value:10
    DRAMC_R0DELDLY[018]=00001F1F
    ==================================================================
                    RX      DQS perbit delay software calibration 
    ==================================================================
    1.0-15 bit dq delay value
    ==================================================================
    bit|     0  1  2  3  4  5  6  7  8  9
    --------------------------------------
    0 |    9 9 9 11 8 8 7 6 5 6 
    10 |    7 7 8 9 6 8 
    --------------------------------------
    
    ==================================================================
    2.dqs window
    x=pass dqs delay value (min~max)center 
    y=0-7bit DQ of every group
    input delay:DQS0 =31 DQS1 = 31
    ==================================================================
    bit     DQS0     bit      DQS1
    0  (1~61)31  8  (1~60)30
    1  (1~60)30  9  (1~59)30
    2  (1~60)30  10  (1~62)31
    3  (1~60)30  11  (1~57)29
    4  (1~60)30  12  (1~60)30
    5  (1~62)31  13  (1~60)30
    6  (1~59)30  14  (1~60)30
    7  (1~60)30  15  (1~60)30
    ==================================================================
    3.dq delay value last
    ==================================================================
    bit|    0  1  2  3  4  5  6  7  8   9
    --------------------------------------
    0 |    9 10 10 12 9 8 8 7 6 7 
    10 |    7 9 9 10 7 9 
    ==================================================================
    ==================================================================
         TX  perbyte calibration 
    ==================================================================
    DQS loop = 15, cmp_err_1 = ffff0000 
    dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
    DQ loop=15, cmp_err_1 = ffff0000
    dqs_perbyte_dly.last_dqdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=2 
    byte:0, (DQS,DQ)=(8,8)
    byte:1, (DQS,DQ)=(8,8)
    20,data:88
    [EMI] DRAMC calibration passed
    
    ===================================================================
                    MT7621   stage1 code done 
                    CPU=500000000 HZ BUS=166666666 HZ
    ===================================================================
    
    
    U-Boot 1.1.3 (Aug 11 2017 - 22:15:36)
    
    Board: Ralink APSoC DRAM:  128 MB
    relocate_code Pointer at: 87fb4000
    
    Config XHCI 40M PLL 
    flash manufacture id: c2, device id 20 18
    find flash: MX25L12805D
    ============================================ 
    Ralink UBoot Version: 5.0.0.0
    -------------------------------------------- 
    ASIC MT7621A DualCore (MAC to MT7530 Mode)
    DRAM_CONF_FROM: Auto-Detection 
    DRAM_TYPE: DDR3 
    DRAM bus: 16 bit
    Xtal Mode=3 OCP Ratio=1/3
    Flash component: SPI Flash
    Date:Aug 11 2017  Time:22:15:36
    ============================================ 
    icache: sets:256, ways:4, linesz:32 ,total:32768
    dcache: sets:256, ways:4, linesz:32 ,total:32768 
    
     ##### The CPU freq = 880 MHZ #### 
     estimate memory size =128 Mbytes
    #Reset_MT7530
    set LAN/WAN WLLLL
    
    Please choose the operation: 
       1: Load system code to SDRAM via TFTP. 
       2: Load system code then write to Flash via TFTP. 
       3: Boot system code via Flash (default).
       4: Entr boot command line interface.
       7: Load Boot Loader code then write to Flash via Serial. 
       9: Load Boot Loader code then write to Flash via TFTP.                                                                                           0 
       
    3: System Boot system code via Flash.
    ## Booting image at bc050000 ...
       Image Name:   MIPS OpenWrt Linux-3.10
       Image Type:   MIPS Linux Kernel Image (lzma compressed)
       Data Size:    9043904 Bytes =  8.6 MB
       Load Address: 81001000
       Entry Point:  8143aab0
       Verifying Checksum ... OK
       Uncompressing Kernel Image ... OK
    No initrd
    ## Transferring control to Linux (at address 8143aab0) ...
    ## Giving linux memsize in MB, 128
    
    Starting kernel ...
    
    
    LINUX started...
    
     THIS IS ASIC
    
    SDK 5.0.S.0
    [    0.000000] Linux version 3.10.14+ (eason@ubuntu) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #19 SMP Fri Aug 24 19:22:43 CST 2018
    [    0.000000] 
    [    0.000000]  The CPU feqenuce set to 880 MHz
    [    0.000000] GCMP present
    [    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
    [    0.000000] Software DMA cache coherency
    [    0.000000] Determined physical RAM map:
    [    0.000000]  memory: 08000000 @ 00000000 (usable)
    [    0.000000] Initrd not found or empty - disabling initrd
    [    0.000000] Zone ranges:
    [    0.000000]   DMA      [mem 0x00000000-0x00ffffff]
    [    0.000000]   Normal   [mem 0x01000000-0x07ffffff]
    [    0.000000] Movable zone start for each node
    [    0.000000] Early memory node ranges
    [    0.000000]   node   0: [mem 0x00000000-0x07ffffff]
    [    0.000000] Detected 3 available secondary CPU(s)
    [    0.000000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.000000] PERCPU: Embedded 7 pages/cpu @816e7000 s6592 r8192 d13888 u32768
    [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32512
    [    0.000000] Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock6 init=/etc/preinit
    [    0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
    [    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
    [    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
    [    0.000000] Writing ErrCtl register=00060ad0
    [    0.000000] Readback ErrCtl register=00060ad0
    [    0.000000] Memory: 123780k/131072k available (4367k kernel code, 7292k reserved, 1205k data, 244k init, 0k highmem)
    [    0.000000] Hierarchical RCU implementation.
    [    0.000000] NR_IRQS:128
    [    0.000000] console [ttyS1] enabled
    [    0.120000] Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
    [    0.160000] pid_max: default: 32768 minimum: 301
    [    0.164000] Mount-cache hash table entries: 512
    [    0.168000] launch: starting cpu1
    [    0.172000] launch: cpu1 gone!
    [    0.172000] CPU1 revision is: 0001992f (MIPS 1004Kc)
    [    0.172000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.172000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.172000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.204000] Synchronize counters for CPU 1: done.
    [    0.212000] launch: starting cpu2
    [    0.216000] launch: cpu2 gone!
    [    0.216000] CPU2 revision is: 0001992f (MIPS 1004Kc)
    [    0.216000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.216000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.216000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.248000] Synchronize counters for CPU 2: done.
    [    0.256000] launch: starting cpu3
    [    0.260000] launch: cpu3 gone!
    [    0.260000] CPU3 revision is: 0001992f (MIPS 1004Kc)
    [    0.260000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.260000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.260000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.288000] Synchronize counters for CPU 3: done.
    [    0.296000] Brought up 4 CPUs
    [    0.300000] devtmpfs: initialized
    [    0.304000] NET: Registered protocol family 16
    [    0.604000] release PCIe RST: RALINK_RSTCTRL = 7000000
    [    0.608000] PCIE PHY initialize
    [    0.612000] ***** Xtal 40MHz *****
    [    0.616000] start MT7621 PCIe register access
    [    1.208000] RALINK_RSTCTRL = 7000000
    [    1.212000] RALINK_CLKCFG1 = 77ffeff8
    [    1.216000] 
    [    1.216000] *************** MT7621 PCIe RC mode *************
    [    1.712000] PCIE2 no card, disable it(RST&CLK)
    [    1.716000] pcie_link status = 0x3
    [    1.720000] RALINK_RSTCTRL= 3000000
    [    1.724000] *** Configure Device number setting of Virtual PCI-PCI bridge ***
    [    1.728000] RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
    [    1.732000] PCIE0 enabled
    [    1.736000] PCIE1 enabled
    [    1.740000] interrupt enable status: 300000
    [    1.744000] Port 1 N_FTS = 1b105000
    [    1.748000] Port 0 N_FTS = 1b105000
    [    1.752000] config reg done
    [    1.756000] init_rt2880pci done
    [    1.772000] bio: create slab  at 0
    [    1.776000] vgaarb: loaded
    [    1.780000] SCSI subsystem initialized
    [    1.784000] PCI host bridge to bus 0000:00
    [    1.788000] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
    [    1.792000] pci_bus 0000:00: root bus resource [io  0x1e160000-0x1e16ffff]
    [    1.796000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
    [    1.800000] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
    [    1.804000] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
    [    1.808000] pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
    [    1.812000] pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
    [    1.816000] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
    [    1.820000] pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
    [    1.824000] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
    [    1.828000] pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
    [    1.832000] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
    [    1.836000] pci 0000:00:00.0: PCI bridge to [bus 01]
    [    1.840000] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
    [    1.844000] pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
    [    1.848000] pci 0000:00:01.0: PCI bridge to [bus 02]
    [    1.852000] pci 0000:00:01.0:   bridge window [mem 0x60100000-0x601fffff]
    [    1.856000] PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
    [    1.860000] PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
    [    1.864000] BAR0 at slot 0 = 0
    [    1.868000] bus=0x0, slot = 0x0
    [    1.872000] res[0]->start = 0
    [    1.876000] res[0]->end = 0
    [    1.880000] res[1]->start = 60200000
    [    1.884000] res[1]->end = 6020ffff
    [    1.888000] res[2]->start = 0
    [    1.892000] res[2]->end = 0
    [    1.896000] res[3]->start = 0
    [    1.900000] res[3]->end = 0
    [    1.904000] res[4]->start = 0
    [    1.908000] res[4]->end = 0
    [    1.912000] res[5]->start = 0
    [    1.916000] res[5]->end = 0
    [    1.920000] BAR0 at slot 1 = 0
    [    1.924000] bus=0x0, slot = 0x1
    [    1.928000] res[0]->start = 0
    [    1.932000] res[0]->end = 0
    [    1.936000] res[1]->start = 60210000
    [    1.940000] res[1]->end = 6021ffff
    [    1.944000] res[2]->start = 0
    [    1.948000] res[2]->end = 0
    [    1.952000] res[3]->start = 0
    [    1.956000] res[3]->end = 0
    [    1.960000] res[4]->start = 0
    [    1.964000] res[4]->end = 0
    [    1.968000] res[5]->start = 0
    [    1.972000] res[5]->end = 0
    [    1.976000] bus=0x1, slot = 0x0, irq=0x4
    [    1.980000] res[0]->start = 60000000
    [    1.984000] res[0]->end = 600fffff
    [    1.988000] res[1]->start = 0
    [    1.992000] res[1]->end = 0
    [    1.996000] res[2]->start = 0
    [    2.000000] res[2]->end = 0
    [    2.004000] res[3]->start = 0
    [    2.008000] res[3]->end = 0
    [    2.012000] res[4]->start = 0
    [    2.016000] res[4]->end = 0
    [    2.020000] res[5]->start = 0
    [    2.024000] res[5]->end = 0
    [    2.028000] bus=0x2, slot = 0x1, irq=0x18
    [    2.032000] res[0]->start = 60100000
    [    2.036000] res[0]->end = 601fffff
    [    2.040000] res[1]->start = 0
    [    2.044000] res[1]->end = 0
    [    2.048000] res[2]->start = 0
    [    2.052000] res[2]->end = 0
    [    2.056000] res[3]->start = 0
    [    2.060000] res[3]->end = 0
    [    2.064000] res[4]->start = 0
    [    2.068000] res[4]->end = 0
    [    2.072000] res[5]->start = 0
    [    2.076000] res[5]->end = 0
    [    2.080000] Switching to clocksource MIPS
    [    2.084000] NET: Registered protocol family 2
    [    2.092000] TCP established hash table entries: 1024 (order: 1, 8192 bytes)
    [    2.108000] TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
    [    2.120000] TCP: Hash tables configured (established 1024 bind 1024)
    [    2.132000] TCP: reno registered
    [    2.140000] UDP hash table entries: 256 (order: 1, 8192 bytes)
    [    2.152000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
    [    2.164000] NET: Registered protocol family 1
    [    2.172000] RPC: Registered named UNIX socket transport module.
    [    2.184000] RPC: Registered udp transport module.
    [    2.192000] RPC: Registered tcp transport module.
    [    2.204000] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    2.304000] 4 CPUs re-calibrate udelay(lpj = 1167360)
    [    2.316000] squashfs: version 4.0 (2009/01/31) Phillip Lougher
    [    2.328000] jffs2: version 2.2. (NAND) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
    [    2.348000] fuse init (API version 7.22)
    [    2.356000] msgmni has been set to 241
    [    2.364000] io scheduler noop registered (default)
    [    2.376000] reg_int_mask=0, INT_MASK= 0 
    [    2.384000] HSDMA_init
    [    2.388000] 
    [    2.388000]  hsdma_phy_tx_ring0 = 0x00c00000, hsdma_tx_ring0 = 0xa0c00000
    [    2.404000] 
    [    2.404000]  hsdma_phy_rx_ring0 = 0x00c04000, hsdma_rx_ring0 = 0xa0c04000
    [    2.420000] TX_CTX_IDX0 = 0
    [    2.428000] TX_DTX_IDX0 = 0
    [    2.432000] RX_CRX_IDX0 = 3ff
    [    2.440000] RX_DRX_IDX0 = 0
    [    2.444000] set_fe_HSDMA_glo_cfg
    [    2.452000] HSDMA_GLO_CFG = 465
    [    2.460000] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
    [    2.472000] serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
    [    2.484000] serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
    [    2.500000] Ralink gpio driver initialized
    [    2.512000] brd: module loaded
    [    2.520000] flash manufacture id: c2, device id 20 18
    [    2.528000] MX25L12805D(c2 2018c220) (16384 Kbytes)
    [    2.540000] mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
    [    2.560000] Creating 11 MTD partitions on "raspi":
    [    2.568000] 0x000000000000-0x000001000000 : "ALL"
    [    2.580000] 0x000000000000-0x000000030000 : "Bootloader"
    [    2.588000] 0x000000030000-0x000000040000 : "Config"
    [    2.600000] 0x000000040000-0x000000050000 : "Factory"
    [    2.612000] 0x000000050000-0x000000b50000 : "firmware"
    [    2.620000] 0x000000050000-0x000000250000 : "kernel"
    [    2.632000] 0x000000250000-0x000000b50000 : "rootfs"
    [    2.644000] 0x000000b50000-0x000000ed0000 : "tm_pattern"
    [    2.652000] 0x000000ed0000-0x000000f50000 : "tm_key"
    [    2.664000] 0x000000f50000-0x000000f80000 : "art_block"
    [    2.676000] 0x000000f80000-0x000001000000 : "rootfs_data"
    [    2.688000] PPP generic driver version 2.4.2
    [    2.696000] PPP BSD Compression module registered
    [    2.704000] PPP MPPE Compression module registered
    [    2.716000] NET: Registered protocol family 24
    [    2.724000] PPTP driver version 0.8.5
    [    2.732000] rdm_major = 253
    [    2.736000] GMAC1_MAC_ADRH -- : 0x0000bc5c
    [    2.744000] GMAC1_MAC_ADRL -- : 0x4c****5b
    [    2.752000] Ralink APSoC Ethernet Driver Initilization. v3.1  1024 rx/tx descriptors allocated, mtu = 1500!
    [    2.772000] [LOG]|WIRE| LAN Starting
    [    2.780000] GMAC1_MAC_ADRH -- : 0x0000bc5c
    [    2.788000] GMAC1_MAC_ADRL -- : 0x4c****5b
    [    2.796000] PROC INIT OK!
    [    2.800000] nf_conntrack version 0.5.0 (1934 buckets, 7736 max)
    [    2.812000] xt_time: kernel timezone is -0000
    [    2.824000] gre: GRE over IPv4 demultiplexor driver
    [    2.832000] ip_tables: (C) 2000-2006 Netfilter Core Team
    [    2.844000] Type=Restricted Cone
    [    2.848000] TCP: cubic registered
    [    2.856000] NET: Registered protocol family 10
    [    2.864000] sit: IPv6 over IPv4 tunneling driver
    [    2.876000] NET: Registered protocol family 17
    [    2.884000] Bridge firewalling registered
    [    2.892000] Ebtables v2.0 registered
    [    2.900000] l2tp_core: L2TP core driver, V2.0
    [    2.908000] l2tp_ppp: PPPoL2TP kernel driver, V2.0
    [    2.916000] l2tp_netlink: L2TP netlink interface
    [    2.928000] 8021q: 802.1Q VLAN Support v1.8
    [    2.944000] VFS: Mounted root (squashfs filesystem) readonly on device 31:6.
    [    2.960000] devtmpfs: mounted
    [    2.968000] Freeing unused kernel memory: 244K (81573000 - 815b0000)
    - preinit -
    Press the [f] key and hit [enter] to enter failsafe mode
    - regular preinit -
    [    7.132000] jffs2: notice: (119) jffs2_build_xattr_subsystem: complete building xattr subsystem, 1 of xdatum (0 unchecked, 0 orphan) and 12 of xref (0 dead, 4 orphan) found.
    switching to jffs2
    - init -
    
    Please press Enter to activate this console. [   10.188000] ip_gre: GRE over IPv4 tunneling driver
    [   10.260000] bonding: Ethernet Channel Bonding Driver: v3.7.1 (April 27, 2011)
    [   10.572000] /proc/router_ip created
    [   10.716000] nf_nat_amanda: Unknown symbol nf_nat_amanda_hook (err 0)
    [   10.836000] Netfilter messages via NETLINK v0.30.
    [   11.008000] ip6_tables: (C) 2000-2006 Netfilter Core Team
    [   11.116000] ctnetlink v0.93: registering with nfnetlink.
    [   14.836000] #########>> ei_open 3378: -2014085120 call work scheduler   FFFFFFBC:5C:4C:FFFFFF**:**:5B
    [   14.852000] Raeth v3.1 (Tasklet)
    [   14.864000] set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1
    [   14.880000] phy_free_head is 0xc08000!!!
    [   14.888000] phy_free_tail_phy is 0xc09ff0!!!
    [   14.896000] txd_pool=a0c10000 phy_txd_pool=00C10000
    [   14.904000] ei_local->skb_free start address is 0x87f3a6dc.
    [   14.916000] free_txd: 00c10010, ei_local->cpu_ptr: 00C10000
    [   14.928000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   14.936000] ----------------+---------+--------
    [   14.944000]      0xa0c10000 0x00C10000 0x00C10000
    [   14.956000] 
    [   14.956000] phy_qrx_ring = 0x00c0a000, qrx_ring = 0xa0c0a000
    [   14.972000] 
    [   14.972000] phy_rx_ring0 = 0x00c0c000, rx_ring0 = 0xa0c0c000
    [   15.008000] MT7530 Reset Completed!!
    [   15.020000] change HW-TRAP to 0x117c8f
    [   15.028000] set LAN/WAN WLLLL
    [   15.040000] GMAC1_MAC_ADRH -- : 0x0000bc5c
    [   15.048000] GMAC1_MAC_ADRL -- : 0x4c****5b
    [   15.056000] GDMA2_MAC_ADRH -- : 0x0000bc5c
    [   15.064000] GDMA2_MAC_ADRL -- : 0x4c****5c
    [   15.072000] eth3: ===> VirtualIF_open
    [   15.080000] MT7621 GE2 link rate to 1G
    [   15.096000] CDMA_CSG_CFG = 81000000
    [   15.104000] GDMA1_FWD_CFG = 20710000
    [   15.108000] GDMA2_FWD_CFG = 20710000
    [   15.116000] #########>> int_gpio_workqueue 3335: return 0[   15.136000] eth3: ===> VirtualIF_open
    [   16.272000] IPv6: ADDRCONF(NETDEV_UP): lo: link is not ready
    [   16.284000] eth3: ===> VirtualIF_close
    [   16.292000] IPv6: ADDRCONF(NETDEV_UP): eth3: link is not ready
    
    [   16.312000] ra2880stop()...Done
    [   16.320000] eth3: ===> VirtualIF_close
    [   16.328000] Free TX/RX Ring Memory!
    [   16.340000] IPv6: ADDRCONF(NETDEV_UP): eth2: link is not ready
    [   16.352000] #########>> ei_open 3378: -2014085120 call work scheduler   FFFFFFBC:5C:4C:FFFFFF**:**:5B
    [   16.372000] Raeth v3.1 (Tasklet)
    [   16.384000] set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1
    [   16.396000] phy_free_head is 0xc08000!!!
    [   16.404000] phy_free_tail_phy is 0xc09ff0!!!
    [   16.412000] txd_pool=a0c10000 phy_txd_pool=00C10000
    [   16.424000] ei_local->skb_free start address is 0x87f3a6dc.
    [   16.436000] free_txd: 00c10010, ei_local->cpu_ptr: 00C10000
    [   16.444000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   16.456000] ----------------+---------+--------
    [   16.464000]      0xa0c10000 0x00C10000 0x00C10000
    [   16.472000] 
    [   16.472000] phy_qrx_ring = 0x00c0a000, qrx_ring = 0xa0c0a000
    [   16.488000] 
    [   16.488000] phy_rx_ring0 = 0x00c0c000, rx_ring0 = 0xa0c0c000
    [   16.524000] MT7530 Reset Completed!!
    [   16.536000] change HW-TRAP to 0x117c8f
    [   16.548000] set LAN/WAN WLLLL
    [   16.556000] GMAC1_MAC_ADRH -- : 0x0000bc5c
    [   16.564000] GMAC1_MAC_ADRL -- : 0x4c****5b
    [   16.576000] eth3: ===> VirtualIF_open
    [   16.580000] MT7621 GE2 link rate to 1G
    [   16.580000] CDMA_CSG_CFG = 81000000
    [   16.580000] GDMA1_FWD_CFG = 20710000
    [   16.580000] GDMA2_FWD_CFG = 20710000
    [   16.580000] device eth2 entered promiscuous mode
    [   16.580000] br-lan: port 1(eth2) entered forwarding state
    [   16.580000] br-lan: port 1(eth2) entered forwarding state
    [   16.580000] eth3: ===> VirtualIF_open
    [   18.584000] br-lan: port 1(eth2) entered forwarding state
    [   19.592000] [LOG]|WIRE| LAN - Port1 Link UP
    [   16.580000] #########>> int_gpio_workqueue 3335: return 0dnsmasq
    dnsmasq [br-lan]
    [   25.956000] mt_wifi: module license 'Proprietary' taints kernel.
    [   25.968000] Disabling lock debugging due to kernel taint
    Qos Disable exit
    [   26.076000] register mt_drv
    [   26.100000] pAd->PciHif.CSRBaseAddress =0xc1400000, csr_addr=0xc1400000!
    [   26.112000] DriverOwn()::Try to Clear FW Own...
    [   26.504000] DriverOwn()::Success to clear FW Own
    [   26.516000] ChipOpsMCUHook
    [   26.544000] pAd->PciHif.CSRBaseAddress =0xc1980000, csr_addr=0xc1980000!
    [   26.556000] DriverOwn()::Try to Clear FW Own...
    [   26.904000] DriverOwn()::Success to clear FW Own
    [   26.916000] ChipOpsMCUHook
    UHTTP crt Checked
    main init
    main init
    page=[/setup/index.html]
    page=[/setup/index.html]
    count=[43]
    count=[43]
    The action_key does not be posted
    The action_key does not be posted
    The action_key does not be posted
    ip6d.c[94] XXXXXXXXXXX  Starting ip6d  XXXXXXXXXXXX
    firewall.c[563] Start IPv6 Firewall
    firewall.c[831] flush_ip6tables
    route.c[33] Start IPv6 Static Routing
    ip6d.c[145] create IP6D_READY
    connect.c[168] XXX disconnect
    [   33.516000] Ralink HW NAT Module Enabled
    [   33.524000] eth2 ifindex =2
    [   33.528000] eth3 ifindex =7
    wlan_wps.c:get_wifi_pin_code:132:ioctl error
    wlan_wps.c:get_wifi_pin_code:132:ioctl error
    connect.c[227] IPv6 Link Local Mode
    connect.c[168] XXX disconnect
    start ddns
    
    add_cron
    add_cron data
    [   40.656000] DriverOwn()::Return since already in Driver Own...
    [   40.672000] RT_CfgSetMacAddress : invalid length (0)
    [   40.688000] default ApCliAPSDCapable[0]=0
    [   40.696000] default ApCliAPSDCapable[1]=0
    [   40.728000] [PMF]Set_PMFMFPC_Proc:: apidx=0, Desired MFPC=0
    [   40.748000] AndesSendCmdMsg: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD
    [   40.812000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   40.836000] WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
    [   40.848000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   40.972000] WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
    [   40.984000] efuse_probe: efuse = 10000212
    [   41.544000] mt7615_antenna_default_reset(): TxPath = 3, RxPath = 3
    [   41.556000] mt7615_antenna_default_reset(): DBDC 2G TxPath = 1, 2G RxPath = 1
    [   41.568000] mt7615_antenna_default_reset(): DBDC 5G TxPath = 1, 2G RxPath = 1
    [   41.584000] RcRadioInit(): DbdcMode=0, ConcurrentBand=1
    [   41.596000] RcRadioInit(): pRadioCtrl=8666a434,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
    [   41.620000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   41.636000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   41.648000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   41.660000] MT7615BBPInit():BBP Initialization.....
    [   41.672000]  Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
    [   41.688000]  Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
    [   41.708000] MT7615BBPInit() todo 
    [   41.716000] mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200] 
    [   41.736000] mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   41.756000] MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0 
    [   41.776000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   42.008000] mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200] 
    [   42.024000] mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   42.044000] MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0 
    [   42.064000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   42.316000] mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200] 
    [   42.332000] mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   42.352000] MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0 
    [   42.372000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   42.640000] mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300] 
    [   42.656000] mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   42.676000] MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0 
    [   42.696000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   42.948000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   42.964000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   42.984000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   43.004000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   43.260000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   43.276000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   43.296000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   43.316000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   43.564000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   43.580000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   43.600000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   43.620000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   43.860000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   43.876000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   43.896000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   43.916000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   44.156000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   44.172000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   44.192000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   44.212000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   44.452000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   44.468000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   44.488000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   44.508000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   44.748000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   44.764000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   44.784000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   44.804000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   45.040000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 14,Channel = 9  
    [   45.060000] Current Channel is 9. DfsZeroWaitSupport=0
    [   45.068000] [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
    [   45.080000] [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
    [   45.092000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   45.112000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   45.132000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   45.152000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   45.172000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   45.500000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   45.516000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   45.536000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   45.556000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   45.576000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   45.908000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   45.924000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   45.944000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   45.964000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   45.984000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.304000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   46.320000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   46.340000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   46.360000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   46.380000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.720000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   46.736000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   46.756000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   46.776000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   46.796000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   47.116000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   47.132000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   47.152000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   47.172000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   47.192000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   47.508000] mt7615_apply_dcoc() : reload Central CH [12] BW [0] from cetral freq [2467]  offset [2500] 
    [   47.524000] mt7615_apply_dpd() : reload Central CH [12] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   47.544000] MtCmdChannelSwitch: control_chl = 12,control_ch2=0, central_chl = 12 DBDCIdx= 0, Band= 0 
    [   47.564000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   47.584000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   47.912000] mt7615_apply_dcoc() : reload Central CH [13] BW [0] from cetral freq [2467]  offset [2500] 
    [   47.928000] mt7615_apply_dpd() : reload Central CH [13] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   47.948000] MtCmdChannelSwitch: control_chl = 13,control_ch2=0, central_chl = 13 DBDCIdx= 0, Band= 0 
    [   47.968000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   47.988000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   48.332000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   48.332000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   48.484000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   48.504000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   48.524000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   48.540000] BW = 0,TXStream = 3, RXStream = 3, scan(0)
    [   48.600000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   48.616000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   48.636000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   48.656000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   48.672000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   48.692000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   48.752000] red_is_enabled: set CR4/N9 RED Enable to 1.
    [   48.760000] cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
    [   48.776000] ***********dev->ifindex = 9
    [   48.856000] device ra0 entered promiscuous mode
    [   48.864000] br-lan: port 2(ra0) entered forwarding state
    [   48.876000] br-lan: port 2(ra0) entered forwarding state
    [   49.116000] DriverOwn()::Return since already in Driver Own...
    [   49.132000] RT_CfgSetMacAddress : invalid length (0)
    [   49.152000] default ApCliAPSDCapable[0]=0
    [   49.160000] default ApCliAPSDCapable[1]=0
    [   49.192000] [PMF]Set_PMFMFPC_Proc:: apidx=0, Desired MFPC=0
    [   49.216000] AndesSendCmdMsg: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD
    [   49.280000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   49.304000] WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
    [   49.316000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   49.436000] WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
    [   49.448000] efuse_probe: efuse = 10000212
    [   50.008000] mt7615_antenna_default_reset(): TxPath = 3, RxPath = 3
    [   50.020000] mt7615_antenna_default_reset(): DBDC 2G TxPath = 1, 2G RxPath = 1
    [   50.036000] mt7615_antenna_default_reset(): DBDC 5G TxPath = 1, 2G RxPath = 1
    [   50.048000] RcRadioInit(): DbdcMode=0, ConcurrentBand=1
    [   50.060000] RcRadioInit(): pRadioCtrl=8484f434,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
    [   50.084000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   50.096000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   50.112000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   50.124000] MT7615BBPInit():BBP Initialization.....
    [   50.136000]  Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
    [   50.152000]  Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
    [   50.172000] MT7615BBPInit() todo 
    [   50.180000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   50.200000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   50.220000] MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   50.236000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   50.472000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   50.488000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   50.508000] MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   50.528000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   50.768000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   50.784000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   50.804000] MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   50.824000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   50.880000] br-lan: port 2(ra0) entered forwarding state
    [   51.076000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   51.092000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   51.112000] MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   51.132000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   51.432000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   51.448000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   51.468000] MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   51.488000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   51.788000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   51.804000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   51.824000] MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   51.844000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   52.136000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   52.152000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   52.172000] MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   52.192000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   52.476000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   52.492000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   52.512000] MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   52.532000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   52.832000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   52.848000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   52.868000] MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   52.888000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   53.172000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   53.188000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   53.208000] MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   53.228000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   53.520000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   53.536000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   53.556000] MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   53.576000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   53.864000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   53.880000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   53.900000] MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   53.920000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   54.180000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   54.196000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   54.216000] MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   54.236000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   54.468000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   54.484000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   54.504000] MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   54.524000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   54.748000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   54.764000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   54.784000] MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   54.804000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   55.092000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   55.108000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   55.128000] MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   55.148000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   55.372000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 49,Channel = 52  
    [   55.392000] Current Channel is 52. DfsZeroWaitSupport=0
    [   55.400000] [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
    [   55.412000] [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
    [   55.424000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   55.424000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   55.596000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   55.616000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   55.636000] MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   55.656000] BW = 2,TXStream = 3, RXStream = 3, scan(0)
    [   55.760000] red_is_enabled: set CR4/N9 RED Enable to 1.
    [   55.768000] cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
    [   55.784000] ***********dev->ifindex = a
    [   55.864000] device rai0 entered promiscuous mode
    [   55.876000] br-lan: port 3(rai0) entered forwarding state
    [   55.888000] br-lan: port 3(rai0) entered forwarding state
    [   57.584000] 
    [   57.584000]  Set_Led_Proc ==> arg = 00-00-00-00-02-00-00-00
    [   57.600000] 
    [   57.600000] Set_Led_Proc
    [   57.608000] 00
    [   57.612000] 00
    [   57.612000] 00
    [   57.616000] 00
    [   57.620000] 02
    [   57.624000] 00
    [   57.628000] 00
    [   57.632000] 00
    [   57.636000] AndesLedEnhanceOP: Success!
    [   57.664000] 
    [   57.664000]  Set_Led_Proc ==> arg = 00-00-00-00-02-00-00-00
    [   57.676000] 
    [   57.676000] Set_Led_Proc
    [   57.684000] 00
    [   57.688000] 00
    [   57.692000] 00
    [   57.696000] 00
    [   57.700000] 02
    [   57.704000] 00
    [   57.708000] 00
    [   57.708000] 00
    [   57.712000] AndesLedEnhanceOP: Success!
    [   57.892000] br-lan: port 3(rai0) entered forwarding state
    FC start
    [   68.676000] u32 classifier
    [   68.684000]     Performance counters on
    [   68.692000]     Actions configured
    FC Disable
    

  • bootlog (WRC-1750GSV)
    ===================================================================
                    MT7621   stage1 code 10:33:55 (ASIC)
                    CPU=500000000 HZ BUS=166666666 HZ
    ==================================================================
    Change MPLL source from XTAL to CR...
    do MEMPLL setting..
    MEMPLL Config : 0x11000000
    3PLL mode + External loopback
    === XTAL-40Mhz === DDR-1200Mhz ===
    PLL3 FB_DL: 0x5, 1/0 = 610/414 15000000
    PLL2 FB_DL: 0xb, 1/0 = 645/379 2D000000
    PLL4 FB_DL: 0x18, 1/0 = 737/287 61000000
    do DDR setting..[01F40000]
    Apply DDR3 Setting...(use default AC)
              0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
          --------------------------------------------------------------------------------
    0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    1
    000E:|    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1
    000F:|    0    0    0    0    1    1    1    1    1    1    1    1    1    1    0    0
    0010:|    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0
    0011:|    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0
    0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    rank 0 coarse = 15
    rank 0 fine = 72
    B:|    0    0    0    0    0    0    0    0    0    1    1    1    0    0    0    0
    opt_dle value:10
    DRAMC_R0DELDLY[018]=0000201F
    ==================================================================
                    RX      DQS perbit delay software calibration 
    ==================================================================
    1.0-15 bit dq delay value
    ==================================================================
    bit|     0  1  2  3  4  5  6  7  8  9
    --------------------------------------
    0 |    11 9 11 11 10 9 10 7 7 8 
    10 |    9 9 9 11 7 11 
    --------------------------------------
     
    ==================================================================
    2.dqs window
    x=pass dqs delay value (min~max)center 
    y=0-7bit DQ of every group
    input delay:DQS0 =31 DQS1 = 32
    ==================================================================
    bit     DQS0     bit      DQS1
    0  (1~59)30  8  (1~61)31
    1  (1~58)29  9  (1~60)30
    2  (1~61)31  10  (1~62)31
    3  (1~62)31  11  (1~59)30
    4  (1~60)30  12  (1~62)31
    5  (1~61)31  13  (1~62)31
    6  (0~60)30  14  (1~60)30
    7  (1~62)31  15  (1~64)32
    ==================================================================
    3.dq delay value last
    ==================================================================
    bit|    0  1  2  3  4  5  6  7  8   9
    --------------------------------------
    0 |    12 11 11 11 11 9 11 7 8 10 
    10 |    10 11 10 12 9 11 
    ==================================================================
    ==================================================================
         TX  perbyte calibration 
    ==================================================================
    DQS loop = 15, cmp_err_1 = ffff0000 
    dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
    DQ loop=15, cmp_err_1 = ffff0000
    dqs_perbyte_dly.last_dqdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=2 
    byte:0, (DQS,DQ)=(8,8)
    byte:1, (DQS,DQ)=(8,8)
    20,data:88
    [EMI] DRAMC calibration passed
     
    ===================================================================
                    MT7621   stage1 code done 
                    CPU=500000000 HZ BUS=166666666 HZ
    ===================================================================
     
     
    U-Boot 1.1.3 (Aug 11 2017 - 22:15:36)
     
    Board: Ralink APSoC DRAM:  128 MB
    relocate_code Pointer at: 87fb4000
     
    Config XHCI 40M PLL 
    flash manufacture id: c2, device id 20 18
    find flash: MX25L12805D
    ============================================ 
    Ralink UBoot Version: 5.0.0.0
    -------------------------------------------- 
    ASIC MT7621A DualCore (MAC to MT7530 Mode)
    DRAM_CONF_FROM: Auto-Detection 
    DRAM_TYPE: DDR3 
    DRAM bus: 16 bit
    Xtal Mode=3 OCP Ratio=1/3
    Flash component: SPI Flash
    Date:Aug 11 2017  Time:22:15:36
    ============================================ 
    icache: sets:256, ways:4, linesz:32 ,total:32768
    dcache: sets:256, ways:4, linesz:32 ,total:32768 
     
     ##### The CPU freq = 880 MHZ #### 
     estimate memory size =128 Mbytes
    #Reset_MT7530
    set LAN/WAN WLLLL
     
    Please choose the operation: 
       1: Load system code to SDRAM via TFTP. 
       2: Load system code then write to Flash via TFTP. 
       3: Boot system code via Flash (default).
       4: Entr boot command line interface.
       7: Load Boot Loader code then write to Flash via Serial. 
       9: Load Boot Loader code then write to Flash via TFTP.                                                                                           0 
        
    3: System Boot system code via Flash.
    ## Booting image at bc050000 ...
       Image Name:   MIPS OpenWrt Linux-3.10
       Image Type:   MIPS Linux Kernel Image (lzma compressed)
       Data Size:    9568192 Bytes =  9.1 MB
       Load Address: 81001000
       Entry Point:  8162cad0
       Verifying Checksum ... OK
       Uncompressing Kernel Image ... OK
    No initrd
    ## Transferring control to Linux (at address 8162cad0) ...
    ## Giving linux memsize in MB, 128
     
    Starting kernel ...
     
     
    LINUX started...
     
     THIS IS ASIC
     
    SDK 5.0.S.0
    [    0.000000] Linux version 3.10.14 (eason@ubuntu) (gcc version 4.6.4 (OpenWrt/Linaro GCC 4.6-2013.05 r48067) ) #1 SMP Thu Jun 6 15:05:42 CST 2019
    [    0.000000] 
    [    0.000000]  The CPU feqenuce set to 880 MHz
    [    0.000000] GCMP present
    [    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
    [    0.000000] Software DMA cache coherency
    [    0.000000] Determined physical RAM map:
    [    0.000000]  memory: 08000000 @ 00000000 (usable)
    [    0.000000] Initrd not found or empty - disabling initrd
    [    0.000000] Zone ranges:
    [    0.000000]   DMA      [mem 0x00000000-0x00ffffff]
    [    0.000000]   Normal   [mem 0x01000000-0x07ffffff]
    [    0.000000] Movable zone start for each node
    [    0.000000] Early memory node ranges
    [    0.000000]   node   0: [mem 0x00000000-0x07ffffff]
    [    0.000000] Detected 3 available secondary CPU(s)
    [    0.000000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.000000] PERCPU: Embedded 7 pages/cpu @81a91000 s6848 r8192 d13632 u32768
    [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32512
    [    0.000000] Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock6 init=/etc/preinit
    [    0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
    [    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
    [    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
    [    0.000000] Writing ErrCtl register=0006ac05
    [    0.000000] Readback ErrCtl register=0006ac05
    [    0.000000] Memory: 120028k/131072k available (6364k kernel code, 11044k reserved, 2266k data, 260k init, 0k highmem)
    [    0.000000] Hierarchical RCU implementation.
    [    0.000000] NR_IRQS:128
    [    0.000000] console [ttyS1] enabled
    [    0.120000] Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
    [    0.160000] pid_max: default: 32768 minimum: 301
    [    0.164000] Mount-cache hash table entries: 512
    [    0.168000] launch: starting cpu1
    [    0.172000] launch: cpu1 gone!
    [    0.172000] CPU1 revision is: 0001992f (MIPS 1004Kc)
    [    0.172000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.172000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.172000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.204000] Synchronize counters for CPU 1: done.
    [    0.212000] launch: starting cpu2
    [    0.216000] launch: cpu2 gone!
    [    0.216000] CPU2 revision is: 0001992f (MIPS 1004Kc)
    [    0.216000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.216000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.216000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.248000] Synchronize counters for CPU 2: done.
    [    0.256000] launch: starting cpu3
    [    0.260000] launch: cpu3 gone!
    [    0.260000] CPU3 revision is: 0001992f (MIPS 1004Kc)
    [    0.260000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.260000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.260000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.288000] Synchronize counters for CPU 3: done.
    [    0.296000] Brought up 4 CPUs
    [    0.300000] NET: Registered protocol family 16
    [    0.600000] release PCIe RST: RALINK_RSTCTRL = 7000000
    [    0.604000] PCIE PHY initialize
    [    0.608000] ***** Xtal 40MHz *****
    [    0.612000] start MT7621 PCIe register access
    [    1.204000] RALINK_RSTCTRL = 7000000
    [    1.208000] RALINK_CLKCFG1 = 77ffeff8
    [    1.212000] 
    [    1.212000] *************** MT7621 PCIe RC mode *************
    [    1.708000] PCIE2 no card, disable it(RST&CLK)
    [    1.712000] pcie_link status = 0x3
    [    1.716000] RALINK_RSTCTRL= 3000000
    [    1.720000] *** Configure Device number setting of Virtual PCI-PCI bridge ***
    [    1.724000] RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
    [    1.728000] PCIE0 enabled
    [    1.732000] PCIE1 enabled
    [    1.736000] interrupt enable status: 300000
    [    1.740000] Port 1 N_FTS = 1b105000
    [    1.744000] Port 0 N_FTS = 1b105000
    [    1.748000] config reg done
    [    1.752000] init_rt2880pci done
    [    1.768000] bio: create slab  at 0
    [    1.772000] vgaarb: loaded
    [    1.776000] SCSI subsystem initialized
    [    1.784000] PCI host bridge to bus 0000:00
    [    1.792000] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
    [    1.804000] pci_bus 0000:00: root bus resource [io  0x1e160000-0x1e16ffff]
    [    1.820000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
    [    1.836000] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
    [    1.852000] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
    [    1.868000] pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
    [    1.880000] pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
    [    1.896000] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
    [    1.908000] pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
    [    1.920000] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
    [    1.936000] pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
    [    1.948000] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
    [    1.964000] pci 0000:00:00.0: PCI bridge to [bus 01]
    [    1.972000] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
    [    1.988000] pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
    [    2.000000] pci 0000:00:01.0: PCI bridge to [bus 02]
    [    2.012000] pci 0000:00:01.0:   bridge window [mem 0x60100000-0x601fffff]
    [    2.024000] PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
    [    2.036000] PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
    [    2.048000] BAR0 at slot 0 = 0
    [    2.052000] bus=0x0, slot = 0x0
    [    2.060000] res[0]->start = 0
    [    2.064000] res[0]->end = 0
    [    2.072000] res[1]->start = 60200000
    [    2.076000] res[1]->end = 6020ffff
    [    2.084000] res[2]->start = 0
    [    2.088000] res[2]->end = 0
    [    2.096000] res[3]->start = 0
    [    2.100000] res[3]->end = 0
    [    2.108000] res[4]->start = 0
    [    2.112000] res[4]->end = 0
    [    2.120000] res[5]->start = 0
    [    2.124000] res[5]->end = 0
    [    2.128000] BAR0 at slot 1 = 0
    [    2.136000] bus=0x0, slot = 0x1
    [    2.144000] res[0]->start = 0
    [    2.148000] res[0]->end = 0
    [    2.152000] res[1]->start = 60210000
    [    2.160000] res[1]->end = 6021ffff
    [    2.168000] res[2]->start = 0
    [    2.172000] res[2]->end = 0
    [    2.180000] res[3]->start = 0
    [    2.184000] res[3]->end = 0
    [    2.192000] res[4]->start = 0
    [    2.196000] res[4]->end = 0
    [    2.200000] res[5]->start = 0
    [    2.208000] res[5]->end = 0
    [    2.212000] bus=0x1, slot = 0x0, irq=0x4
    [    2.220000] res[0]->start = 60000000
    [    2.228000] res[0]->end = 600fffff
    [    2.236000] res[1]->start = 0
    [    2.240000] res[1]->end = 0
    [    2.244000] res[2]->start = 0
    [    2.252000] res[2]->end = 0
    [    2.256000] res[3]->start = 0
    [    2.264000] res[3]->end = 0
    [    2.268000] res[4]->start = 0
    [    2.276000] res[4]->end = 0
    [    2.280000] res[5]->start = 0
    [    2.288000] res[5]->end = 0
    [    2.292000] bus=0x2, slot = 0x1, irq=0x18
    [    2.300000] res[0]->start = 60100000
    [    2.308000] res[0]->end = 601fffff
    [    2.312000] res[1]->start = 0
    [    2.320000] res[1]->end = 0
    [    2.324000] res[2]->start = 0
    [    2.332000] res[2]->end = 0
    [    2.336000] res[3]->start = 0
    [    2.344000] res[3]->end = 0
    [    2.348000] res[4]->start = 0
    [    2.352000] res[4]->end = 0
    [    2.360000] res[5]->start = 0
    [    2.364000] res[5]->end = 0
    [    2.372000] Switching to clocksource MIPS
    [    2.380000] NET: Registered protocol family 2
    [    2.388000] TCP established hash table entries: 1024 (order: 1, 8192 bytes)
    [    2.404000] TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
    [    2.416000] TCP: Hash tables configured (established 1024 bind 1024)
    [    2.428000] TCP: reno registered
    [    2.436000] UDP hash table entries: 256 (order: 1, 8192 bytes)
    [    2.444000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
    [    2.460000] NET: Registered protocol family 1
    [    2.468000] RPC: Registered named UNIX socket transport module.
    [    2.480000] RPC: Registered udp transport module.
    [    2.488000] RPC: Registered tcp transport module.
    [    2.500000] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    2.600000] 4 CPUs re-calibrate udelay(lpj = 1167360)
    [    2.612000] squashfs: version 4.0 (2009/01/31) Phillip Lougher
    [    2.624000] jffs2: version 2.2. (NAND) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
    [    2.644000] fuse init (API version 7.22)
    [    2.652000] msgmni has been set to 234
    [    2.660000] io scheduler noop registered (default)
    [    2.672000] reg_int_mask=0, INT_MASK= 0 
    [    2.680000] HSDMA_init
    [    2.684000] 
    [    2.684000]  hsdma_phy_tx_ring0 = 0x00c00000, hsdma_tx_ring0 = 0xa0c00000
    [    2.700000] 
    [    2.700000]  hsdma_phy_rx_ring0 = 0x00c04000, hsdma_rx_ring0 = 0xa0c04000
    [    2.716000] TX_CTX_IDX0 = 0
    [    2.724000] TX_DTX_IDX0 = 0
    [    2.728000] RX_CRX_IDX0 = 3ff
    [    2.736000] RX_DRX_IDX0 = 0
    [    2.740000] set_fe_HSDMA_glo_cfg
    [    2.748000] HSDMA_GLO_CFG = 465
    [    2.752000] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
    [    2.768000] serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
    [    2.780000] serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
    [    2.792000] Ralink gpio driver initialized
    [    2.804000] brd: module loaded
    [    2.812000] flash manufacture id: c2, device id 20 18
    [    2.824000] MX25L12805D(c2 2018c220) (16384 Kbytes)
    [    2.832000] mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
    [    2.852000] Creating 11 MTD partitions on "raspi":
    [    2.860000] 0x000000000000-0x000001000000 : "ALL"
    [    2.872000] 0x000000000000-0x000000030000 : "Bootloader"
    [    2.884000] 0x000000030000-0x000000040000 : "Config"
    [    2.892000] 0x000000040000-0x000000050000 : "Factory"
    [    2.904000] 0x000000050000-0x000000b50000 : "firmware"
    [    2.916000] 0x000000050000-0x000000450000 : "kernel"
    [    2.924000] 0x000000450000-0x000000b50000 : "rootfs"
    [    2.936000] 0x000000b50000-0x000000ed0000 : "tm_pattern"
    [    2.948000] 0x000000ed0000-0x000000f50000 : "tm_key"
    [    2.956000] 0x000000f50000-0x000000f80000 : "nvram"
    [    2.968000] 0x000000f80000-0x000001000000 : "rootfs_data"
    [    2.976000] PPP generic driver version 2.4.2
    [    2.988000] PPP BSD Compression module registered
    [    2.996000] PPP MPPE Compression module registered
    [    3.004000] NET: Registered protocol family 24
    [    3.016000] PPTP driver version 0.8.5
    [    3.020000] register mt_drv
    [    3.036000] 
    [    3.036000] 
    [    3.036000] === pAd = c0201000, size = 3858008 ===
    [    3.036000] 
    [    3.056000] PciHif.CSRBaseAddress =0xc0100000, csr_addr=0xc0100000!
    [    3.080000] RTMPInitPCIeDevice():device_id=0x7615
    [    3.088000] DriverOwn()::Try to Clear FW Own...
    [    3.396000] DriverOwn()::Success to clear FW Own
    [    3.408000] mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
    [    3.420000] mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
    [    3.432000] RtmpChipOpsHook(492): Not support for HIF_MT yet! MACVersion=0x0
    [    3.444000] mt7615_init()-->
    [    3.452000] Use 1st iPAiLNA default bin.
    [    3.460000] Use 0st /etc_ro/wlan/MT7615E_EEPROM1.bin default bin.
    [    3.472000] 
    [    3.976000] Use 2nd iPAiLNA default bin.
    [    3.984000] Use 1st /etc_ro/wlan/MT7615E_EEPROM2.bin default bin.
    [    3.996000] cpu_ptr: 00CB0000
    [   19.872000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   19.884000] ----------------+---------+--------
    [   19.892000]      0xa0cb0000 0x00CB0000 0x00CB0000
    [   19.900000] 
    [   19.900000] phy_qrx_ring = 0x00caa000, qrx_ring = 0xa0caa000
    [   19.916000] 
    [   19.916000] phy_rx_ring0 = 0x00cac000, rx_ring[0] = 0xa0cac000
    [   19.952000] MT7530 Reset Completed!!
    [   19.964000] change HW-TRAP to 0x117c8f
    [   19.976000] set LAN/WAN WLLLL
    [   19.984000] GMAC1_MAC_ADRH -- : 0x000004ab
    [   19.992000] GMAC1_MAC_ADRL -- : 0x18****db
    [   20.000000] GDMA2_MAC_ADRH -- : 0x000004ab
    [   20.008000] GDMA2_MAC_ADRL -- : 0x18****dc
    [   20.020000] eth3: ===> VirtualIF_open
    [   20.024000] MT7621 GE2 link rate to 1G
    [   20.024000] CDMA_CSG_CFG = 81000000
    [   20.024000] GDMA1_FWD_CFG = 20710000
    [   20.024000] GDMA2_FWD_CFG = 20710000
    [   20.068000] eth3: ===> VirtualIF_open
    [   20.576000] eth3: ===> VirtualIF_close
    [   20.592000] ra2880stop()...Done
    [   20.600000] eth3: ===> VirtualIF_close
    [   20.608000] Free TX/RX Ring Memory!
    [   20.620000]  4:FFFFFFAB:18: 9:FFFFFFC0:FFFFFFDB
    [   20.632000] Raeth v3.1 (Tasklet)
    [   20.644000] set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1
    [   20.656000] phy_free_head is 0xca8000!!!
    [   20.664000] phy_free_tail_phy is 0xca9ff0!!!
    [   20.672000] txd_pool=a0cb0000 phy_txd_pool=00CB0000
    [   20.684000] ei_local->skb_free start address is 0x86dda6cc.
    [   20.696000] free_txd: 00cb0010, ei_local->cpu_ptr: 00CB0000
    [   20.704000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   20.716000] ----------------+---------+--------
    [   20.724000]      0xa0cb0000 0x00CB0000 0x00CB0000
    [   20.732000] 
    [   20.732000] phy_qrx_ring = 0x00caa000, qrx_ring = 0xa0caa000
    [   20.748000] 
    [   20.748000] phy_rx_ring0 = 0x00cac000, rx_ring[0] = 0xa0cac000
    [   20.784000] MT7530 Reset Completed!!
    [   20.800000] change HW-TRAP to 0x117c8f
    [   20.808000] set LAN/WAN WLLLL
    [   20.816000] GMAC1_MAC_ADRH -- : 0x000004ab
    [   20.828000] GMAC1_MAC_ADRL -- : 0x18****db
    [   20.836000] eth3: ===> VirtualIF_open
    [   20.840000] MT7621 GE2 link rate to 1G
    [   20.840000] CDMA_CSG_CFG = 81000000
    [   20.840000] GDMA1_FWD_CFG = 20710000
    [   20.840000] GDMA2_FWD_CFG = 20710000
    [   20.840000] device eth2 entered promiscuous mode
    [   20.840000] br-lan: port 1(eth2) entered forwarding state
    [   20.840000] br-lan: port 1(eth2) entered forwarding state
    [   20.840000] eth3: ===> VirtualIF_open
    [   22.700000] [LOG]|WIRE| LAN - Port1 Link UP
    [   22.844000] br-lan: port 1(eth2) entered forwarding state
    UHTTP crt Checked
    main init
    main init
    page=[/setup/index.html]
    count=[43]
    page=[/setup/index.html]
    count=[43]
    dnsmasq
    dnsmasq [br-lan]
    [   30.908000] DriverOwn()::Return since already in Driver Own...
    [   30.920000] APWdsInitialize():WdsEntry[0]
    [   30.928000] APWdsInitialize():WdsEntry[1]
    [   30.936000] APWdsInitialize():WdsEntry[2]
    [   30.944000] APWdsInitialize():WdsEntry[3]
    [   30.956000] 
    [   30.956000] [Force Roam] => Force Roam Support = 0
    [   30.968000] RT_CfgSetMacAddress : invalid length (0)
    [   30.976000] E2pAccessMode=2
    [   30.984000] SSID[0]=elecom5g-09c0db, EdcaIdx=0
    [   30.992000] TriBandChGrp=0/0/0/0
    [   31.000000] cfg_mode=14
    [   31.004000] cfg_mode=14
    [   31.012000] wmode_band_equal(): Band Equal!
    [   31.020000] BandSteering=0
    [   31.024000] BndStrgBssIdx=
    [   31.032000] [TxPower] BAND0: 100 
    [   31.036000] [SKUenable] BAND0: 1 
    [   31.044000] [PERCENTAGEenable] BAND0: 1 
    [   31.052000] [BFBACKOFFenable] BAND0: 1 
    [   31.060000] CalCacheApply = 0 
    [   31.068000] APEdca0
    [   31.072000] APEdca1
    [   31.076000] APEdca2
    [   31.080000] APEdca3
    [   31.088000] APSDCapable[0]=0
    [   31.092000] APSDCapable[1]=0
    [   31.100000] APSDCapable[2]=0
    [   31.104000] APSDCapable[3]=0
    [   31.108000] APSDCapable[4]=0
    [   31.116000] APSDCapable[5]=0
    [   31.120000] APSDCapable[6]=0
    [   31.128000] APSDCapable[7]=0
    [   31.132000] APSDCapable[8]=0
    [   31.140000] APSDCapable[9]=0
    [   31.144000] APSDCapable[10]=0
    [   31.152000] APSDCapable[11]=0
    [   31.156000] APSDCapable[12]=0
    [   31.164000] APSDCapable[13]=0
    [   31.168000] APSDCapable[14]=0
    [   31.172000] APSDCapable[15]=0
    [   31.180000] default ApCliAPSDCapable[0]=0
    [   31.188000] default ApCliAPSDCapable[1]=0
    [   31.196000] DfsZeroWait Support=0/0 
    [   31.204000] DfsZeroWaitCacTime=0/0 
    [   31.240000] rtmp_read_wds_from_file(): WDS Profile
    [   31.248000] APWdsInitialize():WdsEntry[0]
    [   31.256000] APWdsInitialize():WdsEntry[1]
    [   31.264000] APWdsInitialize():WdsEntry[2]
    [   31.272000] APWdsInitialize():WdsEntry[3]
    [   31.280000] WDS-Enable mode=0
    [   31.288000] AndesSendCmdMsg: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD
    [   31.312000] HT: WDEV[0] Ext Channel = ABOVE
    [   31.320000] HT: greenap_cap = 0
    [   31.360000] IcapMode = 0
    [   31.372000] WtcSetMaxStaNum: MaxStaNum:103, BssidNum:1, WdsNum:4, ApcliNum:2, MaxNumChipRept:16, MinMcastWcid:125
    [   31.392000] Top Init Done!
    [   31.396000] Use alloc_skb
    [   31.404000] RX[0] DESC a0ca4000 size = 16384
    [   31.412000] RX[1] DESC a0ca2000 size = 8192
    [   31.424000] Hif Init Done!
    [   31.428000] ctl->txq = c0aa9e6c
    [   31.436000] ctl->rxq = c0aa9e78
    [   31.440000] ctl->ackq = c0aa9e84
    [   31.448000] ctl->kickq = c0aa9e90
    [   31.456000] ctl->tx_doneq = c0aa9e9c
    [   31.460000] ctl->rx_doneq = c0aa9ea8
    [   31.468000] mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
    [   31.480000] mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
    [   31.496000] AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
    [   31.512000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   31.520000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   31.536000] 20170809192718a
    [   31.540000] 
    [   31.544000] platform = 
    [   31.548000] ALPS
    [   31.552000] hw/sw version = 
    [   31.556000] 8a108a10
    [   31.564000] patch version = 
    [   31.568000] 00000010
    [   31.572000] Patch SEM Status=2
    [   31.580000] MtCmdPatchSemGet:(ret = 0)
    [   31.588000] 
    [   31.588000] Patch is not ready && get semaphore success, SemStatus(2)
    [   31.604000] EventGenericEventHandler: CMD Success
    [   31.612000] MtCmdAddressLenReq:(ret = 0)
    [   31.620000] MtCmdPatchFinishReq
    [   31.636000] EventGenericEventHandler: CMD Success
    [   31.648000] Send checksum req..
    [   31.652000] Patch SEM Status=3
    [   31.660000] MtCmdPatchSemGet:(ret = 0)
    [   31.668000] 
    [   31.668000] Release patch semaphore, SemStatus(3)
    [   31.680000] AndesMTEraseRomPatch
    [   31.684000] WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
    [   31.696000] AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
    [   31.708000] Build Date:_201708190346
    [   31.716000] Build Date:_201708190346
    [   31.724000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   31.736000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   31.748000] EventGenericEventHandler: CMD Success
    [   31.756000] MtCmdAddressLenReq:(ret = 0)
    [   31.772000] EventGenericEventHandler: CMD Success
    [   31.780000] MtCmdAddressLenReq:(ret = 0)
    [   31.788000] MtCmdFwStartReq: override = 1, address = 540672
    [   31.800000] EventGenericEventHandler: CMD Success
    [   31.808000] Build Date:_201707211524
    [   31.816000] EventGenericEventHandler: CMD Success
    [   31.824000] MtCmdAddressLenReq:(ret = 0)
    [   31.836000] MtCmdFwStartReq: override = 4, address = 0
    [   31.896000] EventGenericEventHandler: CMD Success
    [   31.948000] WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
    [   31.960000] MCU Init Done!
    [   31.968000] efuse_probe: efuse = 10000212
    [   31.976000] RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
    [   31.984000] RtmpEepromGetDefault::e2p_dafault=1
    [   31.996000] RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
    [   32.008000] NVM is FLASH mode. dev_idx [1] FLASH OFFSET [0x8000]
    [   32.036000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   32.052000] MtCmdSetTxLpfCal:(ret = 0)
    [   32.060000] MtCmdSetTxIqCal:(ret = 0)
    [   32.068000] MtCmdSetTxDcCal:(ret = 0)
    [   32.076000] MtCmdSetRxFiCal:(ret = 0)
    [   32.084000] MtCmdSetRxFdCal:(ret = 0)
    [   32.088000] MtCmdSetRxFdCal:(ret = 0)
    [   32.096000] MtCmdSetRxFdCal:(ret = 0)
    [   32.104000] MtCmdSetRxFdCal:(ret = 0)
    [   32.112000] MtCmdSetRxFdCal:(ret = 0)
    [   32.120000] MtCmdSetRxFdCal:(ret = 0)
    [   32.128000] MtCmdSetRxFdCal:(ret = 0)
    [   32.132000] MtCmdSetRxFdCal:(ret = 0)
    [   32.140000] MtCmdSetRxFdCal:(ret = 0)
    [   32.148000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   32.700000] Country Region from e2p = 101
    [   32.708000] mt7615_antenna_default_reset(): TxPath = 3, RxPath = 3
    [   32.720000] mt7615_antenna_default_reset(): DBDC 2G TxPath = 1, 2G RxPath = 1
    [   32.736000] mt7615_antenna_default_reset(): DBDC 5G TxPath = 1, 2G RxPath = 1
    [   32.748000] rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
    [   32.760000] RTMPReadTxPwrPerRate(1381): Don't Support this now!
    [   32.772000] RcRadioInit(): DbdcMode=0, ConcurrentBand=1
    [   32.784000] RcRadioInit(): pRadioCtrl=86cb8438,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
    [   32.800000] Band Rf: 1, Phy Mode: 2
    [   32.808000] AntCfgInit(2766): Not support for HIF_MT yet!
    [   32.820000] MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
    [   32.884000] MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
    [   32.896000] EEPROM Init Done!
    [   32.904000] mt_mac_init()-->
    [   32.908000] mt_mac_pse_init(2750): Don't Support this now!
    [   32.920000] mt7615_init_mac_cr()-->
    [   32.928000] mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
    [   32.936000] MtAsicSetMacMaxLen(1300): Not finish Yet!
    [   32.948000] 
    [   33.104000] ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
    [   33.120000] MtCmdSetMacTxRx:(ret = 0)
    [   33.124000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   33.144000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   33.152000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   33.172000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   33.180000] MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   33.200000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   33.572000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   33.588000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   33.596000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   33.616000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   33.624000] MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   33.644000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   34.028000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   34.044000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.052000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   34.072000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   34.080000] MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   34.100000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   34.504000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   34.520000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.528000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   34.548000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   34.556000] MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   34.576000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   34.952000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   34.968000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.976000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   34.996000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.004000] MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   35.024000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   35.436000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   35.452000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.460000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   35.480000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.488000] MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   35.508000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   35.836000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   35.852000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.860000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   35.880000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.888000] MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   35.908000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   36.316000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   36.332000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   36.340000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   36.360000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   36.368000] MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   36.388000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   36.708000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   36.724000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   36.736000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   36.752000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   36.764000] MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   36.780000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   37.176000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   37.192000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   37.200000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   37.220000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   37.232000] MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   37.248000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   37.656000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   37.672000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   37.680000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   37.700000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   37.708000] MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   37.728000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   37.980000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   37.996000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   38.004000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   38.024000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   38.036000] MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   38.052000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   38.340000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   38.356000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   38.364000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   38.384000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   38.396000] MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   38.412000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   38.816000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   38.832000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   38.840000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   38.860000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   38.872000] MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   38.888000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   39.300000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   39.316000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   39.324000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   39.344000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   39.352000] MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   39.372000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   39.784000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   39.800000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   39.808000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   39.828000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   39.840000] MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   39.856000] BW = 2,TXStream = 3, RXStream = 3, scan(1)
    [   40.076000] ====================================================================
    [   40.088000] Channel  36 : Busy Time =   2130, Skip Channel = FALSE, BwCap = TRUE
    [   40.104000] Channel  40 : Busy Time =   4492, Skip Channel = FALSE, BwCap = TRUE
    [   40.120000] Channel  44 : Busy Time =    396, Skip Channel = FALSE, BwCap = TRUE
    [   40.132000] Channel  48 : Busy Time =   1063, Skip Channel = FALSE, BwCap = TRUE
    [   40.148000] Channel  52 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.164000] Channel  56 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.176000] Channel  60 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.192000] Channel  64 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.208000] Channel 100 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.220000] Channel 104 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.236000] Channel 108 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.252000] Channel 112 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.264000] Channel 116 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.280000] Channel 120 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.296000] Channel 124 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.308000] Channel 128 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   40.324000] ====================================================================
    [   40.340000] Rule 3 Channel Busy time value : Select Primary Channel 52 
    [   40.352000] Rule 3 Channel Busy time value : Min Channel Busy = 0
    [   40.364000] Rule 3 Channel Busy time value : BW = 80
    [   40.376000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 49,Channel = 52  
    [   40.396000] ApAutoChannelAtBootUp Force Roam Support = 0
    [   40.484000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=52
    [   40.500000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=49/49, support 19 channels
    [   40.516000] Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
    [   40.528000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   40.528000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   40.556000] bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
    [   40.692000]  [RadarStateCheck]Set into RD_SILENCE_MODE!  
    [   40.716000] MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 1, BandIdx: 0
    [   40.728000] MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0
    [   40.740000] MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 0
    [   40.752000] mt7615_bbp_adjust():rf_bw=2, ext_ch=1, PrimCh=52, HT-CentCh=54, VHT-CentCh=58
    [   40.772000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   40.788000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   40.796000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   40.816000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   40.824000] MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   40.844000] BW = 2,TXStream = 3, RXStream = 3, scan(0)
    [   40.876000] ap_phy_rrm_init_byRf(): AP Set CentralFreq at 58(Prim=52, HT-CentCh=54, VHT-CentCh=58, BBP_BW=2)
    [   40.892000] [WrapDfsRadarDetectStart]: Band0Ch is 52
    [   40.904000] [WrapDfsRadarDetectStart]: Band1Ch is 0
    [   40.928000] LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
    [   40.940000] MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
    [   40.952000] MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
    [   40.964000] MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
    [   40.976000] ap_ftkd> Initialize FT KDP Module...
    [   40.988000] Main bssid = 04:ab:18:**:**:de
    [   40.996000] AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
    [   41.004000] MtCmdSetMacTxRx:(ret = 0)
    [   41.012000] MCS Set = ff ff ff 00 01
    [   41.020000]  Force Roam Support = 0
    [   41.544000] RT_CfgSetMacAddress : invalid length (0)
    [   41.556000] E2pAccessMode=2
    [   41.560000] SSID[0]=elecom2g-09c0db, EdcaIdx=0
    [   41.572000] TriBandChGrp=0/0/0/0
    [   41.580000] cfg_mode=9
    [   41.584000] cfg_mode=9
    [   41.588000] wmode_band_equal(): Band Equal!
    [   41.596000] BandSteering=0
    [   41.604000] BndStrgBssIdx=
    [   41.608000] [TxPower] BAND0: 100 
    [   41.616000] [SKUenable] BAND0: 1 
    [   41.620000] [PERCENTAGEenable] BAND0: 1 
    [   41.628000] [BFBACKOFFenable] BAND0: 1 
    [   41.636000] CalCacheApply = 0 
    [   41.644000] APEdca0
    [   41.648000] APEdca1
    [   41.652000] APEdca2
    [   41.660000] APEdca3
    [   41.664000] APSDCapable[0]=0
    [   41.672000] APSDCapable[1]=0
    [   41.676000] APSDCapable[2]=0
    [   41.680000] APSDCapable[3]=0
    [   41.688000] APSDCapable[4]=0
    [   41.692000] APSDCapable[5]=0
    [   41.700000] APSDCapable[6]=0
    [   41.704000] APSDCapable[7]=0
    [   41.712000] APSDCapable[8]=0
    [   41.716000] APSDCapable[9]=0
    [   41.724000] APSDCapable[10]=0
    [   41.728000] APSDCapable[11]=0
    [   41.732000] APSDCapable[12]=0
    [   41.740000] APSDCapable[13]=0
    [   41.744000] APSDCapable[14]=0
    [   41.752000] APSDCapable[15]=0
    [   41.756000] default ApCliAPSDCapable[0]=0
    [   41.764000] default ApCliAPSDCapable[1]=0
    [   41.776000] DfsZeroWait Support=0/0 
    [   41.784000] DfsZeroWaitCacTime=0/0 
    [   41.816000] rtmp_read_wds_from_file(): WDS Profile
    [   41.828000] APWdsInitialize():WdsEntry[0]
    [   41.836000] APWdsInitialize():WdsEntry[1]
    [   41.844000] APWdsInitialize():WdsEntry[2]
    [   41.852000] APWdsInitialize():WdsEntry[3]
    [   41.860000] WDS-Enable mode=0
    [   41.864000] AndesSendCmdMsg: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD
    [   41.888000] HT: WDEV[0] Ext Channel = ABOVE
    [   41.896000] HT: greenap_cap = 0
    [   41.900000] :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
    [   41.948000] IcapMode = 0
    [   41.960000] WtcSetMaxStaNum: MaxStaNum:103, BssidNum:1, WdsNum:4, ApcliNum:2, MaxNumChipRept:16, MinMcastWcid:125
    [   41.980000] Top Init Done!
    [   41.988000] Use alloc_skb
    [   41.992000] RX[0] DESC a0c14000 size = 16384
    [   42.004000] RX[1] DESC a0c12000 size = 8192
    [   42.012000] Hif Init Done!
    [   42.020000] ctl->txq = c05a9e6c
    [   42.024000] ctl->rxq = c05a9e78
    [   42.032000] ctl->ackq = c05a9e84
    [   42.036000] ctl->kickq = c05a9e90
    [   42.044000] ctl->tx_doneq = c05a9e9c
    [   42.052000] ctl->rx_doneq = c05a9ea8
    [   42.060000] mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
    [   42.072000] mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
    [   42.088000] AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
    [   42.100000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   42.112000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   42.124000] 20170809192718a
    [   42.128000] 
    [   42.132000] platform = 
    [   42.136000] ALPS
    [   42.140000] hw/sw version = 
    [   42.148000] 8a108a10
    [   42.152000] patch version = 
    [   42.156000] 00000010
    [   42.160000] Patch SEM Status=2
    [   42.168000] MtCmdPatchSemGet:(ret = 0)
    [   42.176000] 
    [   42.176000] Patch is not ready && get semaphore success, SemStatus(2)
    [   42.192000] EventGenericEventHandler: CMD Success
    [   42.200000] MtCmdAddressLenReq:(ret = 0)
    [   42.208000] MtCmdPatchFinishReq
    [   42.224000] EventGenericEventHandler: CMD Success
    [   42.236000] Send checksum req..
    [   42.240000] Patch SEM Status=3
    [   42.248000] MtCmdPatchSemGet:(ret = 0)
    [   42.256000] 
    [   42.256000] Release patch semaphore, SemStatus(3)
    [   42.268000] AndesMTEraseRomPatch
    [   42.276000] WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
    [   42.288000] AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
    [   42.300000] Build Date:_201708190346
    [   42.304000] Build Date:_201708190346
    [   42.312000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   42.324000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   42.336000] EventGenericEventHandler: CMD Success
    [   42.348000] MtCmdAddressLenReq:(ret = 0)
    [   42.360000] EventGenericEventHandler: CMD Success
    [   42.368000] MtCmdAddressLenReq:(ret = 0)
    [   42.376000] MtCmdFwStartReq: override = 1, address = 540672
    [   42.388000] EventGenericEventHandler: CMD Success
    [   42.396000] Build Date:_201707211524
    [   42.404000] EventGenericEventHandler: CMD Success
    [   42.412000] MtCmdAddressLenReq:(ret = 0)
    [   42.420000] MtCmdFwStartReq: override = 4, address = 0
    [   42.484000] EventGenericEventHandler: CMD Success
    [   42.536000] WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
    [   42.548000] MCU Init Done!
    [   42.552000] efuse_probe: efuse = 10000212
    [   42.560000] RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
    [   42.572000] RtmpEepromGetDefault::e2p_dafault=1
    [   42.580000] RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
    [   42.596000] NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x0]
    [   42.620000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   42.636000] MtCmdSetTxLpfCal:(ret = 0)
    [   42.644000] MtCmdSetTxIqCal:(ret = 0)
    [   42.652000] MtCmdSetTxDcCal:(ret = 0)
    [   42.660000] MtCmdSetRxFiCal:(ret = 0)
    [   42.668000] MtCmdSetRxFdCal:(ret = 0)
    [   42.676000] MtCmdSetRxFdCal:(ret = 0)
    [   42.684000] MtCmdSetRxFdCal:(ret = 0)
    [   42.688000] MtCmdSetRxFdCal:(ret = 0)
    [   42.696000] MtCmdSetRxFdCal:(ret = 0)
    [   42.704000] MtCmdSetRxFdCal:(ret = 0)
    [   42.712000] MtCmdSetRxFdCal:(ret = 0)
    [   42.720000] MtCmdSetRxFdCal:(ret = 0)
    [   42.724000] MtCmdSetRxFdCal:(ret = 0)
    [   42.732000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   43.284000] Country Region from e2p = 101
    [   43.292000] mt7615_antenna_default_reset(): TxPath = 3, RxPath = 3
    [   43.304000] mt7615_antenna_default_reset(): DBDC 2G TxPath = 1, 2G RxPath = 1
    [   43.320000] mt7615_antenna_default_reset(): DBDC 5G TxPath = 1, 2G RxPath = 1
    [   43.332000] rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
    [   43.332000] br-lan: port 2(rai0) entered forwarding state
    [   43.356000] RTMPReadTxPwrPerRate(1381): Don't Support this now!
    [   43.368000] RcRadioInit(): DbdcMode=0, ConcurrentBand=1
    [   43.380000] RcRadioInit(): pRadioCtrl=87722438,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
    [   43.396000] Band Rf: 1, Phy Mode: 2
    [   43.404000] AntCfgInit(2766): Not support for HIF_MT yet!
    [   43.416000] MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
    [   43.428000] MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
    [   43.440000] EEPROM Init Done!
    [   43.444000] mt_mac_init()-->
    [   43.452000] mt_mac_pse_init(2750): Don't Support this now!
    [   43.460000] mt7615_init_mac_cr()-->
    [   43.468000] mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
    [   43.480000] MtAsicSetMacMaxLen(1300): Not finish Yet!
    [   43.488000] 
    [   43.644000] ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
    [   43.660000] MtCmdSetMacTxRx:(ret = 0)
    [   43.668000] mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200] 
    [   43.684000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.696000] mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   43.712000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.724000] MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0 
    [   43.740000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   43.816000] [WrapDfsRddReportHandle]:  Radar detected !!!!!!!!!!!!!!!!!
    [   43.828000] [WrapDfsRddReportHandle]:  ucRddIdx: 0
    [   43.836000] [WrapDfsRddReportHandle]PrimCh: 116, Band0Ch:116, Band1Ch:0
    [   43.852000]  [WrapDfsRddReportHandle] RD_SILENCE_MODE. Update Uniform Ch=116, Bw=2  
    [   43.868000] MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
    [   43.880000] WifiSysClose(), wdev idx = 0
    [   43.880000] ExtEventBeaconLostHandler::FW LOG, Beacon lost (04:ab:18:**:**:de), Reason 0x10
    [   43.880000]   Beacon lost - AP disabled!!!
    [   43.888000] WifiSysGetBssInfoState(): BssInfoIdx 0 not found!!!
    [   43.888000] WifiSysUpdateBssInfoState(): BssInfoIdx 0 not found!!!
    [   43.964000] ap_ftkd> Release FT KDP Module...
    [   43.972000] MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
    [   43.984000] MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
    [   43.996000] MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
    [   44.008000] WifiSysOpen(), wdev idx = 0
    [   44.016000] wdev_attr_update(): wdevId0 = 04:ab:18:**:**:de
    [   44.028000] [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
    [   44.040000] [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
    [   44.052000] 
    [   44.052000] [Force Roam] => Force Roam Support = 0
    [   44.064000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=116
    [   44.084000] mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200] 
    [   44.084000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.084000] mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   44.084000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.084000] MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0 
    [   44.084000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   44.164000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=49/49, support 19 channels
    [   44.184000] Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
    [   44.192000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   44.192000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   44.224000] bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
    [   44.316000] mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200] 
    [   44.332000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.340000] mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   44.360000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.368000] MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0 
    [   44.368000]  [RadarStateCheck]Set into RD_SILENCE_MODE!  
    [   44.400000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   44.412000] MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 1, BandIdx: 0
    [   44.420000] MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0
    [   44.436000] MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 0
    [   44.448000] mt7615_bbp_adjust():rf_bw=2, ext_ch=1, PrimCh=116, HT-CentCh=118, VHT-CentCh=122
    [   44.464000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   44.484000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.492000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   44.512000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.520000] MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   44.540000] BW = 2,TXStream = 3, RXStream = 3, scan(0)
    [   44.564000] ap_phy_rrm_init_byRf(): AP Set CentralFreq at 122(Prim=116, HT-CentCh=118, VHT-CentCh=122, BBP_BW=2)
    [   44.584000] [WrapDfsRadarDetectStart]: Band0Ch is 116
    [   44.596000] [WrapDfsRadarDetectStart]: Band1Ch is 0
    [   44.620000] LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
    [   44.632000] ap_ftkd> Initialize FT KDP Module...
    [   44.640000] Main bssid = 04:ab:18:**:**:de
    [   44.648000] MtCmdSetDfsTxStart:(ret = 0)
    [   44.800000] mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300] 
    [   44.816000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.824000] mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   44.844000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.852000] MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0 
    [   44.872000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   45.092000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   45.108000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.116000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   45.136000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.144000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   45.164000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   45.384000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   45.400000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.408000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   45.428000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.436000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   45.456000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   45.688000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   45.704000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.712000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   45.732000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.740000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   45.760000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   46.036000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   46.052000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.060000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   46.080000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.088000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   46.108000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   46.328000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   46.344000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.352000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   46.372000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.380000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   46.400000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   46.620000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   46.636000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.644000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   46.664000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.672000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   46.692000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   46.972000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   46.988000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.996000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   47.016000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   47.024000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   47.044000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   47.264000] ====================================================================
    [   47.276000] Channel   1 : Busy Time =   8058, Skip Channel = FALSE, BwCap = TRUE
    [   47.292000] Channel   2 : Busy Time =   3636, Skip Channel = FALSE, BwCap = TRUE
    [   47.308000] Channel   3 : Busy Time =   5301, Skip Channel = FALSE, BwCap = TRUE
    [   47.320000] Channel   4 : Busy Time =   4243, Skip Channel = FALSE, BwCap = TRUE
    [   47.336000] Channel   5 : Busy Time =   5977, Skip Channel = FALSE, BwCap = TRUE
    [   47.352000] Channel   6 : Busy Time =   4301, Skip Channel = FALSE, BwCap = TRUE
    [   47.364000] Channel   7 : Busy Time =   7705, Skip Channel = FALSE, BwCap = TRUE
    [   47.380000] Channel   8 : Busy Time =   2525, Skip Channel = FALSE, BwCap = TRUE
    [   47.396000] Channel   9 : Busy Time =   2181, Skip Channel = FALSE, BwCap = TRUE
    [   47.408000] Channel  10 : Busy Time =   4815, Skip Channel = FALSE, BwCap = TRUE
    [   47.424000] Channel  11 : Busy Time =   4064, Skip Channel = FALSE, BwCap = TRUE
    [   47.440000] ====================================================================
    [   47.452000] Rule 3 Channel Busy time value : Select Primary Channel 9 
    [   47.468000] Rule 3 Channel Busy time value : Min Channel Busy = 2181
    [   47.480000] Rule 3 Channel Busy time value : BW = 20
    [   47.488000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 14,Channel = 9  
    [   47.508000] ApAutoChannelAtBootUp Force Roam Support = 0
    [   47.596000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=9
    [   47.616000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=14/14, support 13 channels
    [   47.632000] Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
    [   47.640000] MtCmdSetMacTxRx:(ret = 0)
    [   47.648000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   47.668000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   47.676000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   47.696000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   47.704000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   47.724000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   47.744000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   48.104000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   48.120000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   48.128000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   48.148000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   48.156000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   48.176000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   48.196000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   48.476000] :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
    [   48.536000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   48.552000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   48.560000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   48.580000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   48.588000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   48.608000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   48.628000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   49.052000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   49.068000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   49.076000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   49.096000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   49.104000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   49.124000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   49.144000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   49.540000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   49.556000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   49.564000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   49.584000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   49.592000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   49.612000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   49.632000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   50.036000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   50.052000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   50.060000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   50.080000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   50.088000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   50.108000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   50.128000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   50.436000] mt7615_apply_dcoc() : reload Central CH [12] BW [0] from cetral freq [2467]  offset [2500] 
    [   50.452000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   50.460000] mt7615_apply_dpd() : reload Central CH [12] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   50.480000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   50.488000] MtCmdChannelSwitch: control_chl = 12,control_ch2=0, central_chl = 12 DBDCIdx= 0, Band= 0 
    [   50.508000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   50.528000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   50.876000] mt7615_apply_dcoc() : reload Central CH [13] BW [0] from cetral freq [2467]  offset [2500] 
    [   50.892000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   50.900000] mt7615_apply_dpd() : reload Central CH [13] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   50.920000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   50.928000] MtCmdChannelSwitch: control_chl = 13,control_ch2=0, central_chl = 13 DBDCIdx= 0, Band= 0 
    [   50.948000] BW = 0,TXStream = 3, RXStream = 3, scan(1)
    [   50.968000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   51.276000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   51.276000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   51.304000] bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 0,                 CmdBssInfoBmcRate.u2McTransmit = 0
    [   51.436000]  [RadarStateCheck]Set into RD_NORMAL_MODE  
    [   51.448000] MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 1, BandIdx: 0
    [   51.460000] MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0
    [   51.472000] MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 0
    [   51.484000] mt7615_bbp_adjust():rf_bw=0, ext_ch=0, PrimCh=9, HT-CentCh=9, VHT-CentCh=0
    [   51.500000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   51.520000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   51.528000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   51.548000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   51.556000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   51.576000] BW = 0,TXStream = 3, RXStream = 3, scan(0)
    [   51.604000] ap_phy_rrm_init_byRf(): AP Set CentralFreq at 9(Prim=9, HT-CentCh=9, VHT-CentCh=0, BBP_BW=0)
    [   51.640000] LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
    [   51.652000] MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
    [   51.664000] MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
    [   51.676000] MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
    [   51.688000] ap_ftkd> Initialize FT KDP Module...
    [   51.700000] Main bssid = 04:ab:18:**:**:dd
    [   51.708000] AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
    [   51.716000] MtCmdSetMacTxRx:(ret = 0)
    [   51.724000] MCS Set = ff ff ff 00 01
    [   51.732000]  cap_vht_bw: 0, correct to cap_vht_bw
    [   51.788000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   51.800000]   MacTabMatchWCID = 0
    [   51.808000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   51.824000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   51.836000]   MacTabMatchWCID = 0
    [   51.844000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   51.860000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   51.872000]   MacTabMatchWCID = 0
    [   51.876000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   51.896000] Total allocated 4 WDS interfaces!
    [   51.904000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   51.924000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   51.940000] WtcSetMaxStaNum: MaxStaNum:103, BssidNum:1, WdsNum:4, ApcliNum:2, MaxNumChipRept:16, MinMcastWcid:125
    [   52.040000] red_is_enabled: set CR4/N9 RED Enable to 1.
    [   52.052000] cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
    [   52.064000] Correct apidx from 0 to 0 for WscUUIDInit
    [   52.076000] Generate UUID for apidx(0)
    [   52.148000] device ra0 entered promiscuous mode
    [   52.156000] br-lan: port 3(ra0) entered forwarding state
    [   52.168000] br-lan: port 3(ra0) entered forwarding state
    [   52.808000] 
    [   52.808000]  Set_Led_Proc ==> arg = 00-00-00-00-02-00-00-00
    [   52.824000] 
    [   52.824000] Set_Led_Proc
    [   52.832000] 00
    [   52.836000] 00
    [   52.836000] 00
    [   52.840000] 00
    [   52.844000] 02
    [   52.848000] 00
    [   52.852000] 00
    [   52.856000] 00
    [   52.856000] AndesLedEnhanceOP: Success!
    [   52.904000] 
    [   52.904000]  Set_Led_Proc ==> arg = 00-00-00-00-02-00-00-00
    [   52.916000] 
    [   52.916000] Set_Led_Proc
    [   52.924000] 00
    [   52.928000] 00
    [   52.932000] 00
    [   52.936000] 00
    [   52.940000] 02
    [   52.944000] 00
    [   52.944000] 00
    [   52.948000] 00
    [   52.952000] AndesLedEnhanceOP: Success!
    [   54.172000] br-lan: port 3(ra0) entered forwarding state
    [   62.372000] Ralink HW NAT Module Enabled
    [   62.380000] eth2 ifindex =4
    [   62.384000] eth3 ifindex =b
    start ddns
     
    add_cron
    add_cron data
    FC start
    FC Disable
    

WRC-1167GST2

ぼーっと某フリマアプリを眺めていたら、偶然ジャンクで安く出ているこの機種を発見。現行品故になかなか価格落ちてこないので衝動的に購入した。
出品者コメントで問題を抱えていることは把握しており、実機を確認したところ何故かファームウェアのヘッダが削除されずFlashに書き込まれてしまっていたためにブートに失敗していた。このため、先にざっくりとだけOpenWrtでファームウェアを組み上げて利用しメーカーファームに復旧した。
弄っていくのでメモ。

Switch

zone WAN LAN
port
(WRC-1167GST2)
INTERNET LAN4 LAN3 LAN2 LAN1
port
(MT7530)
port0 port1 port2 port3 port4

MAC

  • LAN: 04:AB:18:xx:xx:07 (Factory, 0xE000 (hex))
  • WAN: 04:AB:18:xx:xx:08 (Factory, 0xE006 (hex))
  • 2.4G: 04:AB:18:xx:xx:09 (?)
  • 5G: 04:AB:18:xx:xx:0A (?)

U-Boot

  • help
    MT7621 # help
    ?       - alias for 'help'
    bootm   - boot application image from memory
    cp      - memory copy
    erase   - erase SPI FLASH memory
    go      - start application at address 'addr'
    help    - print online help
    httpboot- entering the backup mode.
    loadb   - load binary file over serial line (kermit mode)
    md      - memory display
    mdio   - Ralink PHY register R/W command !!
    mm      - memory modify (auto-incrementing)
    nm      - memory modify (constant address)
    printenv- print environment variables
    reset   - Perform RESET of the CPU
    rf      - read/write rf register
    saveenv - save environment variables to persistent storage
    setenv  - set environment variables
    spi     - spi command
    tftpboot- boot image via network using TFTP protocol
    version - print monitor version
    

  • version
    MT7621 # version
    
    U-Boot 1.1.3 (Nov 20 2018 - 18:09:19)
    

  • printenv
    MT7621 # printenv
    bootcmd=tftp
    bootdelay=5
    baudrate=57600
    ethaddr="00:AA:BB:CC:DD:10"
    ipaddr=192.168.2.1
    serverip=192.168.2.2
    model_id=WRC-1167GST2
    board_id=2018C2838637
    wlan0_guest_ssid=e-tomo-******
    wlan0_guest_key=********
    ez_group_id=elecom-******
    wlan0_ssid=elecom-******
    wlan1_ssid=elecom-******
    wlan0_key=************
    wlan1_key=************
    admin_password=********
    wps_pin=********
    hw_version=A1
    wlan0_domain=0x41
    stdin=serial
    stdout=serial
    stderr=serial
    ethact=Eth0 (10/100-M)
    
    Environment size: 467/4092 bytes
    

Kernel

パスワードが設定されている為ログイン不可。failsafeモードから取得。

  • uname -a
    root@MT7621:/# uname -a
    Linux MT7621 3.10.14 #15 SMP Wed Mar 4 10:17:08 CST 2020 mips GNU/Linux
    

  • cat /proc/version
    root@MT7621:/# cat /proc/version
    Linux version 3.10.14 (*****@*****) (gcc version 4.6.4 (OpenWrt/Linaro GCC 4.6-2013.05 r48067) ) #15 SMP Wed Mar 4 10:17:08 CST 2020
    

  • cat /proc/cpuinfo
    root@MT7621:/# cat /proc/cpuinfo
    system type             : MT7621
    machine                 : Unknown
    processor               : 0
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 1
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 2
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 3
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    

  • cat /proc/meminfo
    root@MT7621:/# cat /proc/meminfo
    MemTotal:         249944 kB
    MemFree:          232196 kB
    Buffers:            1284 kB
    Cached:             2704 kB
    SwapCached:            0 kB
    Active:             1608 kB
    Inactive:           2968 kB
    Active(anon):        592 kB
    Inactive(anon):        4 kB
    Active(file):       1016 kB
    Inactive(file):     2964 kB
    Unevictable:           0 kB
    Mlocked:               0 kB
    SwapTotal:             0 kB
    SwapFree:              0 kB
    Dirty:                 0 kB
    Writeback:             0 kB
    AnonPages:           552 kB
    Mapped:              592 kB
    Shmem:                 4 kB
    Slab:               6260 kB
    SReclaimable:        464 kB
    SUnreclaim:         5796 kB
    KernelStack:         368 kB
    PageTables:           88 kB
    NFS_Unstable:          0 kB
    Bounce:                0 kB
    WritebackTmp:          0 kB
    CommitLimit:      124972 kB
    Committed_AS:       1752 kB
    VmallocTotal:    1048372 kB
    VmallocUsed:        6160 kB
    VmallocChunk:    1042056 kB
    

  • cat /proc/mtd
    root@MT7621:/# cat /proc/mtd
    dev:    size   erasesize  name
    mtd0: 02000000 00010000 "ALL"
    mtd1: 00030000 00010000 "Bootloader"
    mtd2: 00010000 00010000 "Config"
    mtd3: 00010000 00010000 "Factory"
    mtd4: 01800000 00010000 "firmware"
    mtd5: 00a00000 00010000 "kernel"
    mtd6: 00e00000 00010000 "rootfs"
    mtd7: 00400000 00010000 "tm_pattern"
    mtd8: 00100000 00010000 "tm_key"
    mtd9: 000b0000 00010000 "nvram"
    mtd10: 00200000 00010000 "rootfs_data"
    mtd11: 01d00000 00010000 "all_fw_tm"
    

  • cat /sbin/mtk_led | head -n 10
    root@MT7621:/# cat /sbin/mtk_led | head -n 10
    #!/bin/sh
    
    PWR_LED_R=16
    PWR_LED_G=7
    PWR_LED_B=8
    WPS_LED=15
    DBDC=$(uci -q get qcawifi.wlan0.dbdc)
    DBDC_2G_LED=3
    DBDC_5G_LED=4
    
    

  • switch vlan dump
    root@MT7621:/# switch vlan dump
      vid  fid  portmap    s-tag
        1    0  -111111-       0
        2    0  1----11-       0
        3    0  invalid
        4    0  invalid
        5    0  invalid
        6    0  invalid
        7    0  invalid
        8    0  invalid
        9    0  invalid
       10    0  invalid
       11    0  invalid
       12    0  invalid
       13    0  invalid
       14    0  invalid
       15    0  invalid
       16    0  invalid
    

  • bootlog
    ===================================================================
                    MT7621   stage1 code 10:33:55 (ASIC)
                    CPU=500000000 HZ BUS=166666666 HZ
    ==================================================================
    Change MPLL source from XTAL to CR...
    do MEMPLL setting..
    MEMPLL Config : 0x11100000
    3PLL mode + External loopback
    === XTAL-40Mhz === DDR-1200Mhz ===
    PLL3 FB_DL: 0x9, 1/0 = 574/450 25000000
    PLL4 FB_DL: 0x16, 1/0 = 614/410 59000000
    PLL2 FB_DL: 0x1d, 1/0 = 572/452 75000000
    do DDR setting..[01F40000]
    Apply DDR3 Setting...(use customer AC)
              0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
          --------------------------------------------------------------------------------
    0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    1    1
    000E:|    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1    1
    000F:|    0    0    0    0    1    1    1    1    1    1    1    1    1    0    0    0
    0010:|    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0    0
    0011:|    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0    0
    0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    rank 0 coarse = 15
    rank 0 fine = 64
    B:|    0    0    0    0    0    0    0    0    0    0    1    1    1    0    0    0
    opt_dle value:11
    DRAMC_R0DELDLY[018]=00001D1D
    ==================================================================
                    RX      DQS perbit delay software calibration 
    ==================================================================
    1.0-15 bit dq delay value
    ==================================================================
    bit|     0  1  2  3  4  5  6  7  8  9
    --------------------------------------
    0 |    10 9 9 11 10 9 11 8 7 7 
    10 |    10 11 9 11 9 11 
    --------------------------------------
    
    ==================================================================
    2.dqs window
    x=pass dqs delay value (min~max)center 
    y=0-7bit DQ of every group
    input delay:DQS0 =29 DQS1 = 29
    ==================================================================
    bit     DQS0     bit      DQS1
    0  (1~56)28  8  (0~53)26
    1  (1~54)27  9  (1~53)27
    2  (1~57)29  10  (1~56)28
    3  (1~58)29  11  (1~55)28
    4  (1~58)29  12  (1~56)28
    5  (1~56)28  13  (1~55)28
    6  (1~58)29  14  (2~56)29
    7  (1~58)29  15  (2~55)28
    ==================================================================
    3.dq delay value last
    ==================================================================
    bit|    0  1  2  3  4  5  6  7  8   9
    --------------------------------------
    0 |    11 11 9 11 10 10 11 8 10 9 
    10 |    11 12 10 12 9 12 
    ==================================================================
    ==================================================================
         TX  perbyte calibration 
    ==================================================================
    DQS loop = 15, cmp_err_1 = ffff0000 
    dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
    DQ loop=15, cmp_err_1 = ffff0000
    dqs_perbyte_dly.last_dqdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=2 
    byte:0, (DQS,DQ)=(8,8)
    byte:1, (DQS,DQ)=(8,8)
    20,data:88
    [EMI] DRAMC calibration passed
    
    ===================================================================
                    MT7621   stage1 code done 
                    CPU=500000000 HZ BUS=166666666 HZ
    ===================================================================
    
    
    U-Boot 1.1.3 (Nov 20 2018 - 18:09:19)
    
    Board: Ralink APSoC DRAM:  256 MB
    relocate_code Pointer at: 8ffb4000
    
    Config XHCI 40M PLL 
    ******************************
    Software System Reset Occurred
    ******************************
    flash manufacture id: ef, device id 40 19
    find flash: W25Q256FV
    ============================================ 
    Ralink UBoot Version: 5.0.0.0
    -------------------------------------------- 
    ASIC MT7621A DualCore (MAC to MT7530 Mode)
    DRAM_CONF_FROM: Auto-Detection 
    DRAM_TYPE: DDR3 
    DRAM bus: 16 bit
    Xtal Mode=3 OCP Ratio=1/3
    Flash component: SPI Flash
    Date:Nov 20 2018  Time:18:09:19
    ============================================ 
    icache: sets:256, ways:4, linesz:32 ,total:32768
    dcache: sets:256, ways:4, linesz:32 ,total:32768 
    
     ##### The CPU freq = 880 MHZ #### 
     estimate memory size =256 Mbytes
    #Reset_MT7530
    set LAN/WAN WLLLL
    
    Please choose the operation: 
       1: Load system code to SDRAM via TFTP. 
       2: Load system code then write to Flash via TFTP. 
       3: Boot system code via Flash (default).
       4: Entr boot command line interface.
       7: Load Boot Loader code then write to Flash via Serial. 
       9: Load Boot Loader code then write to Flash via TFTP.                                                                                           0 
       
    3: System Boot system code via Flash.
    ## Booting image at bc050000 ...
       Image Name:   MIPS OpenWrt Linux-3.10
       Image Type:   MIPS Linux Kernel Image (lzma compressed)
       Data Size:    17170368 Bytes = 16.4 MB
       Load Address: 81001000
       Entry Point:  81666880
       Verifying Checksum ... OK
       Uncompressing Kernel Image ... OK
    No initrd
    ## Transferring control to Linux (at address 81666880) ...
    ## Giving linux memsize in MB, 256
    
    Starting kernel ...
    
    
    LINUX started...
    
     THIS IS ASIC
    
    SDK 5.0.S.0
    [    0.000000] Linux version 3.10.14 (eason@eason) (gcc version 4.6.4 (OpenWrt/Linaro GCC 4.6-2013.05 r48067) ) #15 SMP Wed Mar 4 10:17:08 CST 2020
    [    0.000000] 
    [    0.000000]  The CPU feqenuce set to 880 MHz
    [    0.000000] GCMP present
    [    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
    [    0.000000] Software DMA cache coherency
    [    0.000000] Determined physical RAM map:
    [    0.000000]  memory: 10000000 @ 00000000 (usable)
    [    0.000000] Initrd not found or empty - disabling initrd
    [    0.000000] Zone ranges:
    [    0.000000]   DMA      [mem 0x00000000-0x00ffffff]
    [    0.000000]   Normal   [mem 0x01000000-0x0fffffff]
    [    0.000000] Movable zone start for each node
    [    0.000000] Early memory node ranges
    [    0.000000]   node   0: [mem 0x00000000-0x0fffffff]
    [    0.000000] Detected 3 available secondary CPU(s)
    [    0.000000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.000000] PERCPU: Embedded 7 pages/cpu @81bd5000 s6848 r8192 d13632 u32768
    [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 65024
    [    0.000000] Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock6 init=/etc/preinit
    [    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
    [    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
    [    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
    [    0.000000] Writing ErrCtl register=000242a8
    [    0.000000] Readback ErrCtl register=000242a8
    [    0.000000] Memory: 249708k/262144k available (6596k kernel code, 12436k reserved, 2315k data, 236k init, 0k highmem)
    [    0.000000] Hierarchical RCU implementation.
    [    0.000000] NR_IRQS:128
    [    0.000000] console [ttyS1] enabled
    [    0.120000] Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
    [    0.160000] pid_max: default: 32768 minimum: 301
    [    0.164000] Mount-cache hash table entries: 512
    [    0.168000] launch: starting cpu1
    [    0.172000] launch: cpu1 gone!
    [    0.172000] CPU1 revision is: 0001992f (MIPS 1004Kc)
    [    0.172000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.172000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.172000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.200000] Synchronize counters for CPU 1: done.
    [    0.208000] launch: starting cpu2
    [    0.212000] launch: cpu2 gone!
    [    0.212000] CPU2 revision is: 0001992f (MIPS 1004Kc)
    [    0.212000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.212000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.212000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.244000] Synchronize counters for CPU 2: done.
    [    0.252000] launch: starting cpu3
    [    0.256000] launch: cpu3 gone!
    [    0.256000] CPU3 revision is: 0001992f (MIPS 1004Kc)
    [    0.256000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.256000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.256000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.284000] Synchronize counters for CPU 3: done.
    [    0.292000] Brought up 4 CPUs
    [    0.296000] NET: Registered protocol family 16
    [    0.596000] release PCIe RST: RALINK_RSTCTRL = 7000000
    [    0.600000] PCIE PHY initialize
    [    0.604000] ***** Xtal 40MHz *****
    [    0.608000] start MT7621 PCIe register access
    [    1.200000] RALINK_RSTCTRL = 7000000
    [    1.204000] RALINK_CLKCFG1 = 77ffeff8
    [    1.208000] 
    [    1.208000] *************** MT7621 PCIe RC mode *************
    [    1.704000] PCIE1 no card, disable it(RST&CLK)
    [    1.708000] PCIE2 no card, disable it(RST&CLK)
    [    1.712000] pcie_link status = 0x1
    [    1.716000] RALINK_RSTCTRL= 1000000
    [    1.720000] *** Configure Device number setting of Virtual PCI-PCI bridge ***
    [    1.724000] RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
    [    1.728000] PCIE0 enabled
    [    1.732000] interrupt enable status: 100000
    [    1.736000] Port 0 N_FTS = 1b105000
    [    1.740000] config reg done
    [    1.744000] init_rt2880pci done
    [    1.764000] bio: create slab  at 0
    [    1.768000] vgaarb: loaded
    [    1.772000] SCSI subsystem initialized
    [    1.780000] PCI host bridge to bus 0000:00
    [    1.788000] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
    [    1.800000] pci_bus 0000:00: root bus resource [io  0x1e160000-0x1e16ffff]
    [    1.816000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
    [    1.832000] pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
    [    1.844000] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
    [    1.860000] pci 0000:00:00.0: BAR 1: assigned [mem 0x60100000-0x6010ffff]
    [    1.872000] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
    [    1.888000] pci 0000:00:00.0: PCI bridge to [bus 01]
    [    1.896000] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
    [    1.908000] BAR0 at slot 0 = 0
    [    1.916000] bus=0x0, slot = 0x0
    [    1.924000] res[0]->start = 0
    [    1.928000] res[0]->end = 0
    [    1.932000] res[1]->start = 60100000
    [    1.940000] res[1]->end = 6010ffff
    [    1.948000] res[2]->start = 0
    [    1.952000] res[2]->end = 0
    [    1.960000] res[3]->start = 0
    [    1.964000] res[3]->end = 0
    [    1.972000] res[4]->start = 0
    [    1.976000] res[4]->end = 0
    [    1.980000] res[5]->start = 0
    [    1.988000] res[5]->end = 0
    [    1.992000] bus=0x1, slot = 0x0, irq=0x4
    [    2.000000] res[0]->start = 60000000
    [    2.008000] res[0]->end = 600fffff
    [    2.016000] res[1]->start = 0
    [    2.020000] res[1]->end = 0
    [    2.028000] res[2]->start = 0
    [    2.032000] res[2]->end = 0
    [    2.036000] res[3]->start = 0
    [    2.044000] res[3]->end = 0
    [    2.048000] res[4]->start = 0
    [    2.056000] res[4]->end = 0
    [    2.060000] res[5]->start = 0
    [    2.068000] res[5]->end = 0
    [    2.072000] Switching to clocksource MIPS
    [    2.080000] NET: Registered protocol family 2
    [    2.088000] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
    [    2.104000] TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
    [    2.116000] TCP: Hash tables configured (established 2048 bind 2048)
    [    2.128000] TCP: reno registered
    [    2.136000] UDP hash table entries: 256 (order: 1, 8192 bytes)
    [    2.148000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
    [    2.160000] NET: Registered protocol family 1
    [    2.168000] RPC: Registered named UNIX socket transport module.
    [    2.180000] RPC: Registered udp transport module.
    [    2.188000] RPC: Registered tcp transport module.
    [    2.200000] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    2.304000] 4 CPUs re-calibrate udelay(lpj = 1163264)
    [    2.316000] squashfs: version 4.0 (2009/01/31) Phillip Lougher
    [    2.328000] jffs2: version 2.2. (NAND) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
    [    2.344000] fuse init (API version 7.22)
    [    2.352000] msgmni has been set to 487
    [    2.360000] io scheduler noop registered (default)
    [    2.372000] reg_int_mask=0, INT_MASK= 0 
    [    2.380000] HSDMA_init
    [    2.384000] 
    [    2.384000]  hsdma_phy_tx_ring0 = 0x00c00000, hsdma_tx_ring0 = 0xa0c00000
    [    2.400000] 
    [    2.400000]  hsdma_phy_rx_ring0 = 0x00c04000, hsdma_rx_ring0 = 0xa0c04000
    [    2.416000] TX_CTX_IDX0 = 0
    [    2.424000] TX_DTX_IDX0 = 0
    [    2.428000] RX_CRX_IDX0 = 3ff
    [    2.436000] RX_DRX_IDX0 = 0
    [    2.440000] set_fe_HSDMA_glo_cfg
    [    2.448000] HSDMA_GLO_CFG = 465
    [    2.456000] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
    [    2.468000] serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
    [    2.480000] serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
    [    2.492000] Ralink gpio driver initialized
    [    2.508000] brd: module loaded
    [    2.512000] flash manufacture id: ef, device id 40 19
    [    2.524000] W25Q256FV(ef 40190000) (32768 Kbytes)
    [    2.532000] mtd .name = raspi, .size = 0x02000000 (32M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
    [    2.552000] Creating 12 MTD partitions on "raspi":
    [    2.560000] 0x000000000000-0x000002000000 : "ALL"
    [    2.572000] 0x000000000000-0x000000030000 : "Bootloader"
    [    2.584000] 0x000000030000-0x000000040000 : "Config"
    [    2.592000] 0x000000040000-0x000000050000 : "Factory"
    [    2.604000] 0x000000050000-0x000001850000 : "firmware"
    [    2.616000] 0x000000050000-0x000000a50000 : "kernel"
    [    2.624000] 0x000000a50000-0x000001850000 : "rootfs"
    [    2.636000] 0x000001850000-0x000001c50000 : "tm_pattern"
    [    2.648000] 0x000001c50000-0x000001d50000 : "tm_key"
    [    2.656000] 0x000001d50000-0x000001e00000 : "nvram"
    [    2.668000] 0x000001e00000-0x000002000000 : "rootfs_data"
    [    2.680000] 0x000000050000-0x000001d50000 : "all_fw_tm"
    [    2.688000] PPP generic driver version 2.4.2
    [    2.696000] PPP BSD Compression module registered
    [    2.708000] PPP MPPE Compression module registered
    [    2.716000] NET: Registered protocol family 24
    [    2.724000] PPTP driver version 0.8.5
    [    2.732000] #############################################
    [    2.744000] ez_init_mod
    [    2.748000] #############################################
    [    2.760000] register mt_drv
    [    2.776000] 
    [    2.776000] 
    [    2.776000] === pAd = c0201000, size = 3961680 ===
    [    2.776000] 
    [    2.796000] PciHif.CSRBaseAddress =0xc0100000, csr_addr=0xc0100000!
    [    2.816000] RTMPInitPCIeDevice():device_id=0x7615
    [    2.828000] DriverOwn()::Try to Clear FW Own...
    [    3.136000] DriverOwn()::Success to clear FW Own
    [    3.144000] mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
    [    3.156000] mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
    [    3.168000] RtmpChipOpsHook(492): Not support for HIF_MT yet! MACVersion=0x0
    [    3.180000] mt7615_init()-->
    [    3.188000] Use 1st iPAiLNA default bin.
    [    3.196000] Use 0st /etc_ro/wlan/MT7615E_EEPROM1.bin default bin.
    [    3.208000] <--mt7615_init()
    [    3.212000] ChipOpsMCUHook
    [    3.224000] cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
    [    3.240000] cut_through_token_list_init(): 8f74d788,8f74d788
    [    3.252000] cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
    [    3.268000] cut_through_token_list_init(): 8f74d798,8f74d798
    [    3.280000]  Regroup Support = 0
    [    3.324000] rdm_major = 253
    [    3.332000] GMAC1_MAC_ADRH -- : 0x000004ab
    [    3.340000] GMAC1_MAC_ADRL -- : 0x181eef07
    [    3.348000] Ralink APSoC Ethernet Driver Initilization. v3.1  1024 rx/tx descriptors allocated, mtu = 1500!
    [    3.368000] [LOG]|WIRE| LAN Starting
    [    3.372000] GMAC1_MAC_ADRH -- : 0x000004ab
    [    3.380000] GMAC1_MAC_ADRL -- : 0x181eef07
    [    3.392000] PROC INIT OK!
    [    3.396000] nf_conntrack version 0.5.0 (3901 buckets, 15604 max)
    [    3.408000] xt_time: kernel timezone is -0000
    [    3.416000] gre: GRE over IPv4 demultiplexor driver
    [    3.428000] ip_tables: (C) 2000-2006 Netfilter Core Team
    [    3.436000] Type=Restricted Cone
    [    3.444000] TCP: cubic registered
    [    3.452000] NET: Registered protocol family 10
    [    3.460000] sit: IPv6 over IPv4 tunneling driver
    [    3.472000] NET: Registered protocol family 17
    [    3.480000] Bridge firewalling registered
    [    3.488000] Ebtables v2.0 registered
    [    3.496000] l2tp_core: L2TP core driver, V2.0
    [    3.504000] l2tp_ppp: PPPoL2TP kernel driver, V2.0
    [    3.512000] l2tp_netlink: L2TP netlink interface
    [    3.520000] 8021q: 802.1Q VLAN Support v1.8
    [    3.536000] VFS: Mounted root (squashfs filesystem) readonly on device 31:6.
    [    3.552000] Freeing unused kernel memory: 236K (818b5000 - 818f0000)
    [    4.236000] init: Console is alive
    [    5.252000] init: - preinit -
    /etc/preinit: line 1: check_skip: not found
    /etc/preinit: line 210: ramips_board_detect: not found
    Press the [f] key and hit [enter] to enter failsafe mode
    Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
    Before mount_root
    [    8.468000] jffs2: notice: (99) jffs2_build_xattr_subsystem: complete building xattr subsystem, 4 of xdatum (0 unchecked, 2 orphan) and 94 of xref (0 dead, 84 orphan) found.
    [    8.500000] mount_root: switching to jffs2 overlay
    cp: can't stat '/etc/changemode': No such file or directory
    cp: can't stat '/etc/config/gxbk': No such file or directory
    Af[    8.556000] procd: - early -
    ter mount_root
    [    9.164000] procd: - ubus -
    [   10.180000] procd: - init -
    Please press Enter to activate this console.
    [   15.348000] ip_gre: GRE over IPv4 tunneling driver
    [   15.376000] bonding: Ethernet Channel Bonding Driver: v3.7.1 (April 27, 2011)
    [   15.592000] /proc/router_ip created
    [   15.836000] ip6_tables: (C) 2000-2006 Netfilter Core Team
    [   15.860000] Netfilter messages via NETLINK v0.30.
    [   16.016000] ctnetlink v0.93: registering with nfnetlink.
    [   16.088000] u32 classifier
    [   16.092000]     Performance counters on
    [   16.100000]     Actions configured
    [   16.120000] Mirror/redirect action on
    [   16.140000] Failed to load ipt action
    [   18.760000]  4:FFFFFFAB:18:1E:FFFFFFEF: 7
    [   18.768000] Raeth v3.1 (Tasklet)
    [   18.776000] set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1
    [   18.792000] phy_free_head is 0xc18000!!!
    [   18.796000] phy_free_tail_phy is 0xc19ff0!!!
    [   18.808000] txd_pool=a0c60000 phy_txd_pool=00C60000
    [   18.816000] ei_local->skb_free start address is 0x8f1026cc.
    [   18.828000] free_txd: 00c60010, ei_local->cpu_ptr: 00C60000
    [   18.840000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   18.848000] ----------------+---------+--------
    [   18.856000]      0xa0c60000 0x00C60000 0x00C60000
    [   18.868000] 
    [   18.868000] phy_qrx_ring = 0x00c1a000, qrx_ring = 0xa0c1a000
    [   18.884000] 
    [   18.884000] phy_rx_ring0 = 0x00c1c000, rx_ring[0] = 0xa0c1c000
    [   18.920000] MT7530 Reset Completed!!
    [   18.932000] change HW-TRAP to 0x117c8f
    [   18.940000] set LAN/WAN WLLLL
    [   18.952000] GMAC1_MAC_ADRH -- : 0x000004ab
    [   18.960000] GMAC1_MAC_ADRL -- : 0x181eef07
    [   18.968000] GDMA2_MAC_ADRH -- : 0x000004ab
    [   18.976000] GDMA2_MAC_ADRL -- : 0x181eef08
    [   18.984000] eth3: ===> VirtualIF_open
    [   18.992000] MT7621 GE2 link rate to 1G
    [   19.000000] CDMA_CSG_CFG = 81000000
    [   19.008000] GDMA1_FWD_CFG = 20710000
    [   19.012000] GDMA2_FWD_CFG = 20710000
    [   19.036000] eth3: ===> VirtualIF_open
    [   19.536000] eth3: ===> VirtualIF_close
    [   19.556000] ra2880stop()...Done
    [   19.564000] eth3: ===> VirtualIF_close
    [   19.572000] Free TX/RX Ring Memory!
    [   19.584000]  4:FFFFFFAB:18:1E:FFFFFFEF: 7
    [   19.592000] Raeth v3.1 (Tasklet)
    [   19.604000] set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1
    [   19.616000] phy_free_head is 0xc18000!!!
    [   19.624000] phy_free_tail_phy is 0xc19ff0!!!
    [   19.632000] txd_pool=a0c60000 phy_txd_pool=00C60000
    [   19.644000] ei_local->skb_free start address is 0x8f1026cc.
    [   19.656000] free_txd: 00c60010, ei_local->cpu_ptr: 00C60000
    [   19.668000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   19.676000] ----------------+---------+--------
    [   19.684000]      0xa0c60000 0x00C60000 0x00C60000
    [   19.696000] 
    [   19.696000] phy_qrx_ring = 0x00c1a000, qrx_ring = 0xa0c1a000
    [   19.712000] 
    [   19.712000] phy_rx_ring0 = 0x00c1c000, rx_ring[0] = 0xa0c1c000
    [   19.744000] MT7530 Reset Completed!!
    [   19.760000] change HW-TRAP to 0x117c8f
    [   19.768000] set LAN/WAN WLLLL
    [   19.780000] GMAC1_MAC_ADRH -- : 0x000004ab
    [   19.788000] GMAC1_MAC_ADRL -- : 0x181eef07
    [   19.796000] eth3: ===> VirtualIF_open
    [   19.804000] MT7621 GE2 link rate to 1G
    [   19.804000] CDMA_CSG_CFG = 81000000
    [   19.804000] GDMA1_FWD_CFG = 20710000
    [   19.804000] GDMA2_FWD_CFG = 20710000
    [   19.804000] device eth2 entered promiscuous mode
    [   19.804000] br-lan: port 1(eth2) entered forwarding state
    [   19.804000] br-lan: port 1(eth2) entered forwarding state
    [   19.804000] eth3: ===> VirtualIF_open
    dnsmasq
    dnsmasq [br-lan]
    [   21.808000] br-lan: port 1(eth2) entered forwarding state
    [   22.448000] [LOG]|WIRE| LAN - Port0 Link UP
    [   22.712000] [LOG]|WIRE| LAN - Port3 Link UP
    UHTTP crt Checked
    main init
    main init
    page=[/setup/index.html]
    page=[/setup/index.html]
    count=[43]
    count=[43]
    [   26.000000] Ralink HW NAT Module Enabled
    [   26.012000] eth2 ifindex =3
    [   26.016000] eth3 ifindex =a
    [   27.764000] jffs2: notice: (2426) jffs2_build_xattr_subsystem: complete building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of xref (0 dead, 0 orphan) found.
    [   28.900000] jffs2: notice: (2652) jffs2_build_xattr_subsystem: complete building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of xref (0 dead, 0 orphan) found.
    NO COPY updated DPI
    0x007f
    [   30.128000] DriverOwn()::Return since already in Driver Own...
    [   30.144000] APWdsInitialize():WdsEntry[0]
    [   30.152000] APWdsInitialize():WdsEntry[1]
    [   30.160000] APWdsInitialize():WdsEntry[2]
    [   30.172000] APWdsInitialize():WdsEntry[3]
    [   30.180000] [wifi_fwd_set_cb_num] band_cb_offset=33, recv_from_cb_offset=34
    [   30.196000] 
    [   30.196000] [Force Roam] => Force Roam Support = 0
    [   30.360000] multi-profile merge success, en:1,pf1_num:1,pf2_num:1,total:2
    [   30.392000] MacAddress1 = 00:00:00:00:00:00
    [   30.400000] E2pAccessMode=2
    [   30.408000] SSID[0]=elecom-1eef07, EdcaIdx=0
    [   30.416000] SSID[1]=elecom-1eef07, EdcaIdx=0
    [   30.424000] RTMPSetProfileParameters(): DBDC Mode=1
    [   30.436000] TriBandChGrp=0/0/0/0
    [   30.444000] cfg_mode=14
    [   30.448000] cfg_mode=14
    [   30.452000] wmode_band_equal(): Band Equal!
    [   30.464000] cfg_mode=9
    [   30.468000] cfg_mode=9
    [   30.472000] BandSteering=0
    [   30.480000] BndStrgBssIdx=1;1
    [   30.488000] [TxPower] BAND0: 100, BAND1: 100 
    [   30.496000] [SKUenable] BAND0: 1, BAND1: 1 
    [   30.504000] [PERCENTAGEenable] BAND0: 1, BAND1: 1 
    [   30.516000] [BFBACKOFFenable] BAND0: 1, BAND1: 1 
    [   30.524000] CalCacheApply = 0 
    [   30.532000] tdts: module license 'Proprietary' taints kernel.
    [   30.532000] APEdca0
    [   30.532000] Valid=1
    [   30.532000] APAifsn[0]=3
    [   30.532000] APAifsn[1]=7
    [   30.532000] APAifsn[2]=1
    [   30.532000] APAifsn[3]=1
    [   30.532000] APEdca1
    [   30.536000] Valid=1
    [   30.536000] APAifsn[0]=3
    [   30.536000] APAifsn[1]=7
    [   30.536000] APAifsn[2]=1
    [   30.536000] APAifsn[3]=1
    [   30.536000] APEdca2
    [   30.536000] APEdca3
    [   30.540000] BSSAifsn[0]=3
    [   30.540000] BSSAifsn[1]=7
    [   30.540000] BSSAifsn[2]=2
    [   30.540000] BSSAifsn[3]=2
    [   30.540000] BSSAifsn[0]=3
    [   30.540000] BSSAifsn[1]=7
    [   30.540000] BSSAifsn[2]=2
    [   30.540000] BSSAifsn[3]=2
    [   30.540000] APSDCapable[0]=0
    [   30.540000] APSDCapable[1]=0
    [   30.540000] default ApCliAPSDCapable[0]=0
    [   30.540000] default ApCliAPSDCapable[1]=0
    [   30.544000] DfsZeroWait Support=0/0 
    [   30.544000] DfsZeroWaitCacTime=0/0 
    [   30.592000] rtmp_read_wds_from_file(): WDS Profile
    [   30.592000] APWdsInitialize():WdsEntry[0]
    [   30.592000] APWdsInitialize():WdsEntry[1]
    [   30.592000] APWdsInitialize():WdsEntry[2]
    [   30.592000] APWdsInitialize():WdsEntry[3]
    [   30.592000] WDS-Enable mode=0
    [   30.596000] AndesSendCmdMsg: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD
    [   30.600000] HT: WDEV[0] Ext Channel = ABOVE
    [   30.600000] HT: WDEV[1] Ext Channel = ABOVE
    [   30.600000] HT: greenap_cap = 0
    [   30.664000] IcapMode = 0
    [   30.676000] WtcSetMaxStaNum: MaxStaNum:102, BssidNum:2, WdsNum:4, ApcliNum:2, MaxNumChipRept:16, MinMcastWcid:124
    [   30.676000] Top Init Done!
    [   30.676000] Use alloc_skb
    [   30.676000] RX[0] DESC a0c14000 size = 16384
    [   30.680000] RX[1] DESC a0c12000 size = 8192
    [   30.680000] Hif Init Done!
    [   30.680000] ctl->txq = c05c32c0
    [   30.680000] ctl->rxq = c05c32cc
    [   30.680000] ctl->ackq = c05c32d8
    [   30.680000] ctl->kickq = c05c32e4
    [   30.680000] ctl->tx_doneq = c05c32f0
    [   30.680000] ctl->rx_doneq = c05c32fc
    [   30.684000] mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
    [   30.684000] mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
    [   30.684000] AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
    [   30.684000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   30.684000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   30.684000] 20170809192718a
    [   30.684000] 
    [   30.684000] platform = 
    [   30.684000] ALPS
    [   30.684000] hw/sw version = 
    [   30.684000] 8a108a10
    [   30.684000] patch version = 
    [   30.684000] 00000010
    [   30.684000] Patch SEM Status=2
    [   30.684000] MtCmdPatchSemGet:(ret = 0)
    [   30.684000] 
    [   30.684000] Patch is not ready && get semaphore success, SemStatus(2)
    [   30.684000] EventGenericEventHandler: CMD Success
    [   30.684000] MtCmdAddressLenReq:(ret = 0)
    [   30.684000] MtCmdPatchFinishReq
    [   30.696000] EventGenericEventHandler: CMD Success
    [   30.696000] Send checksum req..
    [   30.696000] Patch SEM Status=3
    [   30.696000] MtCmdPatchSemGet:(ret = 0)
    [   30.696000] 
    [   30.696000] Release patch semaphore, SemStatus(3)
    [   30.696000] AndesMTEraseRomPatch
    [   30.696000] WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
    [   30.696000] AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
    [   30.696000] Build Date:_201708190346
    [   30.696000] Build Date:_201708190346
    [   30.696000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   30.696000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   30.696000] EventGenericEventHandler: CMD Success
    [   30.696000] MtCmdAddressLenReq:(ret = 0)
    [   30.700000] EventGenericEventHandler: CMD Success
    [   30.744000] MtCmdAddressLenReq:(ret = 0)
    [   30.744000] MtCmdFwStartReq: override = 1, address = 540672
    [   30.748000] EventGenericEventHandler: CMD Success
    [   30.748000] Build Date:_201707211524
    [   30.748000] EventGenericEventHandler: CMD Success
    [   30.748000] MtCmdAddressLenReq:(ret = 0)
    [   30.748000] MtCmdFwStartReq: override = 4, address = 0
    [   30.800000] EventGenericEventHandler: CMD Success
    [   30.852000] WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
    [   30.852000] MCU Init Done!
    [   30.852000]  MtCmdSetRlmPorCal: (ret = 0) 
    [   30.852000] efuse_probe: efuse = 10000212
    [   30.852000] RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
    [   30.852000] RtmpEepromGetDefault::e2p_dafault=1
    [   30.852000] RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
    [   30.852000] NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x0]
    [   30.868000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   30.876000] MtCmdSetTxLpfCal:(ret = 0)
    [   30.876000] MtCmdSetTxIqCal:(ret = 0)
    [   30.876000] MtCmdSetTxDcCal:(ret = 0)
    [   30.876000] MtCmdSetRxFiCal:(ret = 0)
    [   30.876000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   31.376000] Disabling lock debugging due to kernel taint
    [   31.416000] Init chrdev /dev/detector with major 190
    [   31.420000] Country Region from e2p = 101
    [   31.420000] mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
    [   31.420000] mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
    [   31.420000] mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
    [   31.420000] rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
    [   31.420000] RTMPReadTxPwrPerRate(1381): Don't Support this now!
    [   31.420000] RcRadioInit(): DbdcMode=1, ConcurrentBand=2
    [   31.420000] RcRadioInit(): pRadioCtrl=8f74e454,Band=0,rfcap=1,channel=1,PhyMode=2 extCha=0xf
    [   31.420000] RcRadioInit(): pRadioCtrl=8f74e540,Band=1,rfcap=2,channel=36,PhyMode=1 extCha=0xf
    [   31.420000] MtCmdSetDbdcCtrl:(ret = 0)
    [   31.420000] Band Rf: 1, Phy Mode: 2
    [   31.420000] Band Rf: 2, Phy Mode: 1
    [   31.420000] AntCfgInit(2766): Not support for HIF_MT yet!
    [   31.420000] MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
    [   31.484000] MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
    [   31.596000] EEPROM Init Done!
    [   31.596000] mt_mac_init()-->
    [   31.596000] mt_mac_pse_init(2750): Don't Support this now!
    [   31.596000] mt7615_init_mac_cr()-->
    [   31.596000] mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
    [   31.596000] mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
    [   31.596000] MtAsicSetMacMaxLen(1300): Not finish Yet!
    [   31.596000] 
    [   31.616000] ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 3
    [   31.616000] MtCmdSetMacTxRx:(ret = 0)
    [   31.616000] MtCmdSetMacTxRx:(ret = 0)
    [   31.616000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   31.616000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   31.616000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   31.616000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   31.616000] MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   31.616000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   31.824000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   31.824000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   31.824000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   31.824000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   31.824000] MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   31.824000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   32.012000] tdts: tcp_conn_max = 4000
    [   32.012000] 
    [   32.024000] tdts: tcp_conn_timeout = 300 sec
    [   32.024000] 
    [   32.032000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   32.032000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   32.032000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   32.032000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   32.032000] MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   32.032000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   32.224000] SHN Release Version: 1.0.0 RELS_0004
    [   32.232000] UDB Core Version: 0.2.18
    [   32.240000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   32.240000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   32.240000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   32.240000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   32.240000] MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   32.240000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   32.324000] Init chrdev /dev/idpfw with major 191
    [   32.380000] IDPfw: IDPfw is ready
    [   32.388000] sizeof forward pkt param = 192
    Running license control..waiting 25 second ...
    [   32.456000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   32.472000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   32.480000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   32.500000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   32.512000] MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   32.528000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   32.748000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   32.764000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   32.772000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   32.792000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   32.800000] MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   32.820000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   33.144000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   33.160000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   33.168000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   33.188000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   33.200000] MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   33.216000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   33.500000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   33.516000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   33.524000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   33.544000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   33.556000] MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   33.572000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   33.812000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   33.828000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   33.836000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   33.856000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   33.868000] MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   33.884000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   34.104000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   34.120000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.132000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   34.148000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   34.160000] MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   34.176000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   34.452000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   34.468000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.476000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   34.496000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   34.508000] MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   34.524000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   34.744000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   34.760000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.772000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   34.792000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   34.800000] MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   34.816000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   35.056000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   35.072000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.080000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   35.100000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.112000] MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   35.128000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   35.376000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   35.392000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.400000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   35.424000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.432000] MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   35.448000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   35.668000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   35.684000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.692000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   35.712000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.724000] MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   35.740000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   35.972000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   35.988000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.996000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   36.016000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   36.028000] MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   36.044000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   36.264000] ====================================================================
    [   36.276000] Channel  36 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.292000] Channel  40 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.308000] Channel  44 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.320000] Channel  48 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.336000] Channel  52 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.352000] Channel  56 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.364000] Channel  60 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.380000] Channel  64 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.396000] Channel 100 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.408000] Channel 104 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.424000] Channel 108 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.440000] Channel 112 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.452000] Channel 116 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.468000] Channel 120 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.484000] Channel 124 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.500000] Channel 128 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   36.512000] ====================================================================
    [   36.528000] Rule 3 Channel Busy time value : Select Primary Channel 36 
    [   36.540000] Rule 3 Channel Busy time value : Min Channel Busy = 0
    [   36.552000] Rule 3 Channel Busy time value : BW = 80
    [   36.564000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 49,Channel = 36  
    [   36.584000]  AutoChSelUpdateChannel(): Update channel for wdev1 for this band PhyMode = 14,Channel = 0  
    [   36.604000] mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200] 
    [   36.624000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   36.632000] mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   36.652000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   36.660000] MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0 
    [   36.676000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   36.936000] mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200] 
    [   36.952000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   36.960000] mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   36.980000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   36.988000] MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0 
    [   37.008000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   37.228000] mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200] 
    [   37.244000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   37.252000] mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   37.272000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   37.280000] MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0 
    [   37.300000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   37.520000] mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300] 
    [   37.536000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   37.544000] mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   37.564000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   37.572000] MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0 
    [   37.592000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   37.856000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   37.872000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   37.880000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   37.900000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   37.908000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   37.928000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   38.148000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   38.164000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   38.172000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   38.192000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   38.200000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   38.220000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   38.464000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   38.480000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   38.488000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   38.508000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   38.520000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   38.536000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    ntp sync server OK
    [   38.756000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   38.772000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   38.780000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   38.800000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   38.808000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   38.828000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   39.048000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   39.064000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   39.072000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   39.092000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   39.100000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   39.120000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   39.340000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   39.356000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   39.364000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   39.384000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   39.392000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   39.412000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   39.716000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   39.732000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   39.740000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   39.760000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   39.768000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   39.788000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   40.172000] ====================================================================
    [   40.184000] Channel   1 : Busy Time =   9352, Skip Channel = FALSE, BwCap = TRUE
    [   40.200000] Channel   2 : Busy Time =   6114, Skip Channel = FALSE, BwCap = TRUE
    [   40.216000] Channel   3 : Busy Time =   3682, Skip Channel = FALSE, BwCap = TRUE
    [   40.228000] Channel   4 : Busy Time =   5663, Skip Channel = FALSE, BwCap = TRUE
    [   40.244000] Channel   5 : Busy Time =   2559, Skip Channel = FALSE, BwCap = TRUE
    [   40.260000] Channel   6 : Busy Time =   8949, Skip Channel = FALSE, BwCap = TRUE
    [   40.272000] Channel   7 : Busy Time =   5390, Skip Channel = FALSE, BwCap = TRUE
    [   40.288000] Channel   8 : Busy Time =   4072, Skip Channel = FALSE, BwCap = TRUE
    [   40.304000] Channel   9 : Busy Time =   8350, Skip Channel = FALSE, BwCap = TRUE
    [   40.316000] Channel  10 : Busy Time =   6335, Skip Channel = FALSE, BwCap = TRUE
    [   40.332000] Channel  11 : Busy Time =  15349, Skip Channel = FALSE, BwCap = TRUE
    [   40.348000] ====================================================================
    [   40.360000] Rule 3 Channel Busy time value : Select Primary Channel 5 
    [   40.376000] Rule 3 Channel Busy time value : Min Channel Busy = 2559
    [   40.388000] Rule 3 Channel Busy time value : BW = 20
    [   40.396000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 49,Channel = 36  
    [   40.416000]  AutoChSelUpdateChannel(): Update channel for wdev1 for this band PhyMode = 14,Channel = 5  
    [   40.436000] ApAutoChannelAtBootUp Force Roam Support = 0
    [   40.544000] ez_allocate_or_update_non_ez_band_hook:: add new band entry at index: 0
    [   40.560000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=36
    [   40.580000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=2/49, support 32 channels
    [   40.596000] Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
    [   40.604000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   40.604000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   40.636000] bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
    [   40.668000] MtCmdSetDbdcCtrl:(ret = 0)
    [   40.776000]  [RadarStateCheck]Set into RD_NORMAL_MODE  
    [   40.788000] MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 1, BandIdx: 1
    [   40.800000] MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 1
    [   40.812000] MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 1
    [   40.824000] mt7615_bbp_adjust():rf_bw=2, ext_ch=1, PrimCh=36, HT-CentCh=38, VHT-CentCh=42
    [   40.840000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   40.860000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   40.868000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   40.888000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   40.896000] MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   40.916000] BW = 2,TXStream = 2, RXStream = 2, scan(0)
    [   40.944000] ap_phy_rrm_init_byRf(): AP Set CentralFreq at 42(Prim=36, HT-CentCh=38, VHT-CentCh=42, BBP_BW=2)
    [   40.976000] [WrapDfsRadarDetectStart]: Band0Ch is 36
    [   40.988000] [WrapDfsRadarDetectStart]: Band1Ch is 0
    [   40.996000] LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
    [   41.008000] MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
    [   41.020000] MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
    [   41.032000] MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
    [   41.048000] WifiFwdSet::disabled=0
    [   41.052000] ap_ftkd> Initialize FT KDP Module...
    [   41.064000] Main bssid = 04:ab:18:**:**:0a
    [   41.072000] AsicRadioOnOffCtrl(): DbdcIdx=1 RadioOn
    [   41.084000] MtCmdSetMacTxRx:(ret = 0)
    [   41.088000] MtCmdSetMacTxRx:(ret = 0)
    [   41.096000] MCS Set = ff ff 00 00 01
    [   41.104000]  Regroup Support = 0
    [   41.168000] WDS_Init():
    [   41.172000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   41.184000]   MacTabMatchWCID = 0
    [   41.192000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   41.204000]   MacTabMatchWCID = 0
    [   41.212000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   41.224000]   MacTabMatchWCID = 0
    [   41.232000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   41.240000]   MacTabMatchWCID = 0
    [   41.248000] Total allocated 4 WDS interfaces!
    [   41.260000] ###########################ez_init_hook########################
    [   41.272000] 
    [   41.272000] [REGROUP] => Regroup Support = 0
    [   41.284000] ###########################ez_init_hook########################
    [   41.300000] 
    [   41.300000] [REGROUP] => Regroup Support = 0
    [   41.312000] WtcSetMaxStaNum: MaxStaNum:102, BssidNum:2, WdsNum:4, ApcliNum:2, MaxNumChipRept:16, MinMcastWcid:124
    [   41.380000] red_is_enabled: set CR4/N9 RED Enable to 1.
    [   41.392000] cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
    [   41.404000] Correct apidx from 0 to 0 for WscUUIDInit
    [   41.416000] Generate UUID for apidx(0)
    [   41.420000] PpeDevRegHandler : ineterface ra0 register (0)
    [   41.572000] device ra0 entered promiscuous mode
    [   41.580000] br-lan: port 2(ra0) entered forwarding state
    [   41.592000] br-lan: port 2(ra0) entered forwarding state
    1592648716
    1571256552
    [   42.004000] :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
    [   42.052000] WifiSysOpen(), wdev idx = 1
    [   42.060000] wdev_attr_update(): wdevId1 = 04:ab:18:**:**:09
    [   42.072000] MtCmdSetDbdcCtrl:(ret = 0)
    [   42.080000] [PMF]APPMFInit:: apidx=1, MFPC=0, MFPR=0, SHA256=0
    [   42.092000] [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
    [   42.104000] 
    [   42.104000] [Force Roam] => Force Roam Support = 0
    [   42.116000] ez_allocate_or_update_non_ez_band_hook:: add new band entry at index: 1
    [   42.132000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=5
    [   42.148000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=14/49, support 32 channels
    [   42.168000] Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
    [   42.176000] MtCmdSetMacTxRx:(ret = 0)
    [   42.184000] MtCmdSetMacTxRx:(ret = 0)
    [   42.192000] mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200] 
    [   42.212000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   42.220000] mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   42.240000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   42.252000] MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0 
    [   42.268000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   42.288000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   42.596000] mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200] 
    [   42.612000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   42.624000] mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   42.640000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   42.652000] MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0 
    [   42.668000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   42.688000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   42.996000] mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300] 
    [   43.020000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.028000] mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   43.048000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.056000] MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0 
    [   43.076000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   43.092000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   43.404000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   43.420000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.428000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   43.448000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.456000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   43.476000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   43.496000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   43.596000] br-lan: port 2(ra0) entered forwarding state
    [   43.804000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   43.820000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.828000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   43.848000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.856000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   43.876000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   43.896000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   44.204000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   44.220000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.228000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   44.248000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.256000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   44.276000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   44.296000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   44.708000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   44.724000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.732000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   44.752000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.760000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   44.780000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   44.800000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   45.308000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   45.324000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.332000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   45.352000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.360000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   45.380000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   45.400000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   45.780000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   45.796000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.804000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   45.824000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.836000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   45.852000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   45.872000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.332000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   46.348000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.356000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   46.376000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.384000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   46.404000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   46.424000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.804000] mt7615_apply_dcoc() : reload Central CH [12] BW [0] from cetral freq [2467]  offset [2500] 
    [   46.820000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.828000] mt7615_apply_dpd() : reload Central CH [12] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   46.848000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.860000] MtCmdChannelSwitch: control_chl = 12,control_ch2=0, central_chl = 12 DBDCIdx= 0, Band= 0 
    [   46.876000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   46.896000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   47.232000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:126 for WDEV_TYPE:1
    [   47.232000]  LinkToOmacIdx = 11, LinkToWdevType = 1
    [   47.260000] bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 0,                 CmdBssInfoBmcRate.u2McTransmit = 0
    [   47.288000] MtCmdSetDbdcCtrl:(ret = 0)
    [   47.396000]  [RadarStateCheck]Set into RD_NORMAL_MODE  
    [   47.408000] MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 1, BandIdx: 0
    [   47.420000] MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0
    [   47.432000] MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 0
    [   47.444000] mt7615_bbp_adjust():rf_bw=0, ext_ch=0, PrimCh=5, HT-CentCh=5, VHT-CentCh=42
    [   47.460000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   47.480000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   47.488000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   47.508000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   47.516000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   47.536000] BW = 0,TXStream = 2, RXStream = 2, scan(0)
    [   47.564000] ap_phy_rrm_init_byRf(): AP Set CentralFreq at 5(Prim=5, HT-CentCh=5, VHT-CentCh=42, BBP_BW=0)
    [   47.596000] LeadTimeForBcn, OmacIdx = 11, WDEV_WITH_BCN_ABILITY
    [   47.608000] Generate UUID for apidx(1)
    [   47.616000] PpeDevRegHandler : ineterface rax0 register (1)
    [   47.720000] device rax0 entered promiscuous mode
    [   47.732000] br-lan: port 3(rax0) entered forwarding state
    [   47.744000] br-lan: port 3(rax0) entered forwarding state
    Qos Disable exit
    Qos Disable exit
    Qos Disable exit
    [   49.748000] br-lan: port 3(rax0) entered forwarding state
    [   50.284000] PpeDevRegHandler : ineterface apclix0 register (2)
    [   50.296000] WifiSysOpen(), wdev idx = 7
    [   50.304000] MtCmdSetDbdcCtrl:(ret = 0)
    [   50.316000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=5
    [   50.332000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=5
    [   50.352000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=14/49, support 32 channels
    [   50.376000] PpeDevRegHandler : ineterface apcli0 register (4)
    [   50.384000] WifiSysOpen(), wdev idx = 6
    [   50.392000] MtCmdSetDbdcCtrl:(ret = 0)
    [   50.400000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=36
    [   50.420000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=36
    [   50.436000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=14/49, support 32 channels
    [   51.320000] BndStrg_Init()
    BndStrg_SetInfFlags(): BSS(04:AB:18:**:**:0A) set 5G Inf ra0 ready.
    BndStrg_SetInfFlags(): BSS(04:AB:18:**:**:09) set 2G Inf rax0 ready.
    BndStrg Enable Success
    
    [   51.368000] BndStrg is already Enable
    [   51.368000] 
    [   53.476000] BndStrg_InfStatusRsp:INF [rax0]STATUS QUERY ON
    [   53.488000] 
    [   53.488000] BndStrg_InfStatusRsp:INF [ra0]STATUS QUERY ON
    start ddns
    
    add_cron
    add_cron data
    dnsmasq
    dnsmasq [br-lan]
    [   55.520000] Send DISASSOC frame(3) with ra0
    [   55.528000] Send DISASSOC frame(3) with ra1
    [   55.536000] Send DISASSOC frame(3) with ra0
    [   55.544000] Send DISASSOC frame(3) with ra1
    FC start
    FC Disable
    192.168.2.100
    Qos Disable exit
    

WRC-2533GST2

知人氏にハードオフで代理購入して頂くことができ、入手したもの。WRC-2533GSTとほぼ同じと思いきや、意外と差異があった。
サポートのため弄っていくのでメモ。

Switch

zone WAN LAN
port
(WRC-2533GST2)
INTERNET LAN4 LAN3 LAN2 LAN1
port
(MT7530)
port0 port1 port2 port3 port4

MAC

  • LAN: 04:AB:18:xx:xx:83 (Factory, 0xE000 (hex))
  • WAN: 04:AB:18:xx:xx:84 (Factory, 0xE006 (hex))
  • 2.4G: 04:AB:18:xx:xx:85 (Factory, 0x4 (hex))
  • 5G: 04:AB:18:xx:xx:86 (Factory, 0x8004 (hex))

U-Boot

  • help
    MT7621 # help
    ?       - alias for 'help'
    bootm   - boot application image from memory
    cp      - memory copy
    erase   - erase SPI FLASH memory
    go      - start application at address 'addr'
    help    - print online help
    httpboot- entering the backup mode.
    loadb   - load binary file over serial line (kermit mode)
    md      - memory display
    mdio   - Ralink PHY register R/W command !!
    mm      - memory modify (auto-incrementing)
    nm      - memory modify (constant address)
    printenv- print environment variables
    reset   - Perform RESET of the CPU
    rf      - read/write rf register
    saveenv - save environment variables to persistent storage
    setenv  - set environment variables
    spi     - spi command
    tftpboot- boot image via network using TFTP protocol
    version - print monitor version
    

  • version
    MT7621 # version
    
    U-Boot 1.1.3 (Nov 20 2018 - 18:09:19)
    

  • printenv
    MT7621 # printenv
    bootcmd=tftp
    bootdelay=5
    baudrate=57600
    ethaddr="00:AA:BB:CC:DD:10"
    ipaddr=192.168.2.1
    serverip=192.168.2.2
    model_id=WRC-2533GST2
    board_id=2019A1221168
    wlan0_guest_ssid=e-tomo-******
    wlan0_guest_key=********
    ez_group_id=elecom-******
    wlan0_ssid=elecom-******
    wlan1_ssid=elecom-******
    wlan0_key=************
    wlan1_key=************
    admin_password=********
    wps_pin=*******
    hw_version=A1
    wlan0_domain=0x41
    stdin=serial
    stdout=serial
    stderr=serial
    ethact=Eth0 (10/100-M)
    
    Environment size: 467/4092 bytes
    

Kernel

パスワードが設定されているため、ログイン不可。failsafeモードはあるのでそこから情報取得。

  • uname -a
    root@MT7621:/# uname -a
    Linux MT7621 3.10.14 #6 SMP Tue Oct 29 14:31:40 CST 2019 mips GNU/Linux
    

  • cat /proc/version
    root@MT7621:/# cat /proc/version
    Linux version 3.10.14 (*****@ubuntu) (gcc version 4.6.4 (OpenWrt/Linaro GCC 4.6-2013.05 r48067) ) #6 SMP Tue Oct 29 14:31:40 CST 2019
    

  • cat /proc/cpuinfo
    root@MT7621:/# cat /proc/cpuinfo
    system type             : MT7621
    machine                 : Unknown
    processor               : 0
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 577.53
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 1
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 577.53
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 2
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 577.53
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 3
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 577.53
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    

  • cat /proc/meminfo
    root@MT7621:/# cat /proc/meminfo
    MemTotal:         250236 kB
    MemFree:          226360 kB
    Buffers:            1284 kB
    Cached:             2704 kB
    SwapCached:            0 kB
    Active:             1580 kB
    Inactive:           2964 kB
    Active(anon):        560 kB
    Inactive(anon):        4 kB
    Active(file):       1020 kB
    Inactive(file):     2960 kB
    Unevictable:           0 kB
    Mlocked:               0 kB
    SwapTotal:             0 kB
    SwapFree:              0 kB
    Dirty:                 0 kB
    Writeback:             0 kB
    AnonPages:           564 kB
    Mapped:              592 kB
    Shmem:                 4 kB
    Slab:               8168 kB
    SReclaimable:        460 kB
    SUnreclaim:         7708 kB
    KernelStack:         368 kB
    PageTables:           88 kB
    NFS_Unstable:          0 kB
    Bounce:                0 kB
    WritebackTmp:          0 kB
    CommitLimit:      125116 kB
    Committed_AS:       1752 kB
    VmallocTotal:    1048372 kB
    VmallocUsed:       10864 kB
    VmallocChunk:    1037300 kB
    

  • cat /proc/mtd
    root@MT7621:/# cat /proc/mtd
    dev:    size   erasesize  name
    mtd0: 02000000 00010000 "ALL"
    mtd1: 00030000 00010000 "Bootloader"
    mtd2: 00010000 00010000 "Config"
    mtd3: 00010000 00010000 "Factory"
    mtd4: 01800000 00010000 "firmware"
    mtd5: 00a00000 00010000 "kernel"
    mtd6: 00e00000 00010000 "rootfs"
    mtd7: 00400000 00010000 "tm_pattern"
    mtd8: 00100000 00010000 "tm_key"
    mtd9: 000b0000 00010000 "nvram"
    mtd10: 00200000 00010000 "rootfs_data"
    mtd11: 01d00000 00010000 "all_fw_tm"
    

  • cat /sbin/mtk_led | head -n 10
    root@MT7621:/# cat /sbin/mtk_led | head -n 10
    #!/bin/sh
    
    PWR_LED_R=16
    PWR_LED_G=7
    PWR_LED_B=8
    WPS_LED=15
    DBDC=$(uci -q get qcawifi.wlan0.dbdc)
    DBDC_2G_LED=3
    DBDC_5G_LED=4
    
    

  • switch vlan dump
    root@MT7621:/# switch vlan dump
      vid  fid  portmap    s-tag
        1    0  -111111-       0
        2    0  1----11-       0
        3    0  invalid
        4    0  invalid
        5    0  invalid
        6    0  invalid
        7    0  invalid
        8    0  invalid
        9    0  invalid
       10    0  invalid
       11    0  invalid
       12    0  invalid
       13    0  invalid
       14    0  invalid
       15    0  invalid
       16    0  invalid
    

  • uname -a
    
    

  • uname -a
    
    

  • uname -a
    
    

  • bootlog
    
    ===================================================================
                    MT7621   stage1 code 10:33:55 (ASIC)
                    CPU=500000000 HZ BUS=166666666 HZ
    ==================================================================
    Change MPLL source from XTAL to CR...
    do MEMPLL setting..
    MEMPLL Config : 0x11100000
    3PLL mode + External loopback
    === XTAL-40Mhz === DDR-1200Mhz ===
    PLL2 FB_DL: 0xa, 1/0 = 601/423 29000000
    PLL3 FB_DL: 0xb, 1/0 = 623/401 2D000000
    PLL4 FB_DL: 0x13, 1/0 = 537/487 4D000000
    do DDR setting..[01F40000]
    Apply DDR3 Setting...(use customer AC)
              0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
          --------------------------------------------------------------------------------
    0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    1
    000E:|    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1
    000F:|    0    0    0    0    1    1    1    1    1    1    1    1    1    1    0    0
    0010:|    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0
    0011:|    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0
    0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    rank 0 coarse = 15
    rank 0 fine = 72
    B:|    0    0    0    0    0    0    0    0    1    1    1    0    0    0    0    0
    opt_dle value:9
    DRAMC_R0DELDLY[018]=00001E1F
    ==================================================================
                    RX      DQS perbit delay software calibration 
    ==================================================================
    1.0-15 bit dq delay value
    ==================================================================
    bit|     0  1  2  3  4  5  6  7  8  9
    --------------------------------------
    0 |    6 7 7 9 7 7 7 6 7 5 
    10 |    9 8 9 9 8 10 
    --------------------------------------
    
    ==================================================================
    2.dqs window
    x=pass dqs delay value (min~max)center 
    y=0-7bit DQ of every group
    input delay:DQS0 =31 DQS1 = 30
    ==================================================================
    bit     DQS0     bit      DQS1
    0  (1~59)30  8  (1~59)30
    1  (1~58)29  9  (1~58)29
    2  (1~58)29  10  (1~58)29
    3  (1~60)30  11  (1~58)29
    4  (1~60)30  12  (1~60)30
    5  (1~60)30  13  (1~59)30
    6  (1~59)30  14  (1~59)30
    7  (1~61)31  15  (1~60)30
    ==================================================================
    3.dq delay value last
    ==================================================================
    bit|    0  1  2  3  4  5  6  7  8   9
    --------------------------------------
    0 |    7 9 9 10 8 8 8 6 7 6 
    10 |    10 9 9 9 8 10 
    ==================================================================
    ==================================================================
         TX  perbyte calibration 
    ==================================================================
    DQS loop = 15, cmp_err_1 = ffff0000 
    dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
    DQ loop=15, cmp_err_1 = ffff0000
    dqs_perbyte_dly.last_dqdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=2 
    byte:0, (DQS,DQ)=(8,8)
    byte:1, (DQS,DQ)=(8,8)
    20,data:88
    [EMI] DRAMC calibration passed
    
    ===================================================================
                    MT7621   stage1 code done 
                    CPU=500000000 HZ BUS=166666666 HZ
    ===================================================================
    
    
    U-Boot 1.1.3 (Nov 20 2018 - 18:09:19)
    
    Board: Ralink APSoC DRAM:  256 MB
    relocate_code Pointer at: 8ffb4000
    
    Config XHCI 40M PLL 
    flash manufacture id: c2, device id 20 19
    find flash: MX25L25635E
    ============================================ 
    Ralink UBoot Version: 5.0.0.0
    -------------------------------------------- 
    ASIC MT7621A DualCore (MAC to MT7530 Mode)
    DRAM_CONF_FROM: Auto-Detection 
    DRAM_TYPE: DDR3 
    DRAM bus: 16 bit
    Xtal Mode=3 OCP Ratio=1/3
    Flash component: SPI Flash
    Date:Nov 20 2018  Time:18:09:19
    ============================================ 
    icache: sets:256, ways:4, linesz:32 ,total:32768
    dcache: sets:256, ways:4, linesz:32 ,total:32768 
    
     ##### The CPU freq = 880 MHZ #### 
     estimate memory size =256 Mbytes
    #Reset_MT7530
    set LAN/WAN WLLLL
    
    Please choose the operation: 
       1: Load system code to SDRAM via TFTP. 
       2: Load system code then write to Flash via TFTP. 
       3: Boot system code via Flash (default).
       4: Entr boot command line interface.
       7: Load Boot Loader code then write to Flash via Serial. 
       9: Load Boot Loader code then write to Flash via TFTP.                                                                                           0 
       
    3: System Boot system code via Flash.
    ## Booting image at bc050000 ...
       Image Name:   MIPS OpenWrt Linux-3.10
       Image Type:   MIPS Linux Kernel Image (lzma compressed)
       Data Size:    17170368 Bytes = 16.4 MB
       Load Address: 81001000
       Entry Point:  8162d1c0
       Verifying Checksum ... OK
       Uncompressing Kernel Image ... OK
    No initrd
    ## Transferring control to Linux (at address 8162d1c0) ...
    ## Giving linux memsize in MB, 256
    
    Starting kernel ...
    
    
    LINUX started...
    
     THIS IS ASIC
    
    SDK 5.0.S.0
    [    0.000000] Linux version 3.10.14 (eason@ubuntu) (gcc version 4.6.4 (OpenWrt/Linaro GCC 4.6-2013.05 r48067) ) #6 SMP Tue Oct 29 14:31:40 CST 2019
    [    0.000000] 
    [    0.000000]  The CPU feqenuce set to 880 MHz
    [    0.000000] GCMP present
    [    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
    [    0.000000] Software DMA cache coherency
    [    0.000000] Determined physical RAM map:
    [    0.000000]  memory: 10000000 @ 00000000 (usable)
    [    0.000000] Initrd not found or empty - disabling initrd
    [    0.000000] Zone ranges:
    [    0.000000]   DMA      [mem 0x00000000-0x00ffffff]
    [    0.000000]   Normal   [mem 0x01000000-0x0fffffff]
    [    0.000000] Movable zone start for each node
    [    0.000000] Early memory node ranges
    [    0.000000]   node   0: [mem 0x00000000-0x0fffffff]
    [    0.000000] Detected 3 available secondary CPU(s)
    [    0.000000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.000000] PERCPU: Embedded 7 pages/cpu @81b92000 s6848 r8192 d13632 u32768
    [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 65024
    [    0.000000] Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock6 init=/etc/preinit
    [    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
    [    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
    [    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
    [    0.000000] Writing ErrCtl register=00074157
    [    0.000000] Readback ErrCtl register=00074157
    [    0.000000] Memory: 249976k/262144k available (6366k kernel code, 12168k reserved, 2264k data, 260k init, 0k highmem)
    [    0.000000] Hierarchical RCU implementation.
    [    0.000000] NR_IRQS:128
    [    0.000000] console [ttyS1] enabled
    [    0.120000] Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
    [    0.160000] pid_max: default: 32768 minimum: 301
    [    0.164000] Mount-cache hash table entries: 512
    [    0.168000] launch: starting cpu1
    [    0.172000] launch: cpu1 gone!
    [    0.172000] CPU1 revision is: 0001992f (MIPS 1004Kc)
    [    0.172000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.172000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.172000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.204000] Synchronize counters for CPU 1: done.
    [    0.212000] launch: starting cpu2
    [    0.216000] launch: cpu2 gone!
    [    0.216000] CPU2 revision is: 0001992f (MIPS 1004Kc)
    [    0.216000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.216000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.216000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.248000] Synchronize counters for CPU 2: done.
    [    0.256000] launch: starting cpu3
    [    0.260000] launch: cpu3 gone!
    [    0.260000] CPU3 revision is: 0001992f (MIPS 1004Kc)
    [    0.260000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.260000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.260000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.288000] Synchronize counters for CPU 3: done.
    [    0.296000] Brought up 4 CPUs
    [    0.300000] NET: Registered protocol family 16
    [    0.600000] release PCIe RST: RALINK_RSTCTRL = 7000000
    [    0.604000] PCIE PHY initialize
    [    0.608000] ***** Xtal 40MHz *****
    [    0.612000] start MT7621 PCIe register access
    [    1.204000] RALINK_RSTCTRL = 7000000
    [    1.208000] RALINK_CLKCFG1 = 77ffeff8
    [    1.212000] 
    [    1.212000] *************** MT7621 PCIe RC mode *************
    [    1.708000] PCIE2 no card, disable it(RST&CLK)
    [    1.712000] pcie_link status = 0x3
    [    1.716000] RALINK_RSTCTRL= 3000000
    [    1.720000] *** Configure Device number setting of Virtual PCI-PCI bridge ***
    [    1.724000] RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
    [    1.728000] PCIE0 enabled
    [    1.732000] PCIE1 enabled
    [    1.736000] interrupt enable status: 300000
    [    1.740000] Port 1 N_FTS = 1b105000
    [    1.744000] Port 0 N_FTS = 1b105000
    [    1.748000] config reg done
    [    1.752000] init_rt2880pci done
    [    1.768000] bio: create slab  at 0
    [    1.772000] vgaarb: loaded
    [    1.776000] SCSI subsystem initialized
    [    1.784000] PCI host bridge to bus 0000:00
    [    1.792000] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
    [    1.804000] pci_bus 0000:00: root bus resource [io  0x1e160000-0x1e16ffff]
    [    1.820000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
    [    1.836000] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
    [    1.852000] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
    [    1.868000] pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
    [    1.880000] pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
    [    1.896000] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
    [    1.908000] pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
    [    1.920000] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
    [    1.936000] pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
    [    1.948000] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
    [    1.964000] pci 0000:00:00.0: PCI bridge to [bus 01]
    [    1.972000] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
    [    1.988000] pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
    [    2.000000] pci 0000:00:01.0: PCI bridge to [bus 02]
    [    2.012000] pci 0000:00:01.0:   bridge window [mem 0x60100000-0x601fffff]
    [    2.024000] PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
    [    2.036000] PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
    [    2.048000] BAR0 at slot 0 = 0
    [    2.052000] bus=0x0, slot = 0x0
    [    2.060000] res[0]->start = 0
    [    2.064000] res[0]->end = 0
    [    2.072000] res[1]->start = 60200000
    [    2.076000] res[1]->end = 6020ffff
    [    2.084000] res[2]->start = 0
    [    2.088000] res[2]->end = 0
    [    2.096000] res[3]->start = 0
    [    2.100000] res[3]->end = 0
    [    2.108000] res[4]->start = 0
    [    2.112000] res[4]->end = 0
    [    2.120000] res[5]->start = 0
    [    2.124000] res[5]->end = 0
    [    2.128000] BAR0 at slot 1 = 0
    [    2.136000] bus=0x0, slot = 0x1
    [    2.144000] res[0]->start = 0
    [    2.148000] res[0]->end = 0
    [    2.152000] res[1]->start = 60210000
    [    2.160000] res[1]->end = 6021ffff
    [    2.168000] res[2]->start = 0
    [    2.172000] res[2]->end = 0
    [    2.180000] res[3]->start = 0
    [    2.184000] res[3]->end = 0
    [    2.192000] res[4]->start = 0
    [    2.196000] res[4]->end = 0
    [    2.200000] res[5]->start = 0
    [    2.208000] res[5]->end = 0
    [    2.212000] bus=0x1, slot = 0x0, irq=0x4
    [    2.220000] res[0]->start = 60000000
    [    2.228000] res[0]->end = 600fffff
    [    2.236000] res[1]->start = 0
    [    2.240000] res[1]->end = 0
    [    2.248000] res[2]->start = 0
    [    2.252000] res[2]->end = 0
    [    2.256000] res[3]->start = 0
    [    2.264000] res[3]->end = 0
    [    2.268000] res[4]->start = 0
    [    2.276000] res[4]->end = 0
    [    2.280000] res[5]->start = 0
    [    2.288000] res[5]->end = 0
    [    2.292000] bus=0x2, slot = 0x1, irq=0x18
    [    2.300000] res[0]->start = 60100000
    [    2.308000] res[0]->end = 601fffff
    [    2.312000] res[1]->start = 0
    [    2.320000] res[1]->end = 0
    [    2.324000] res[2]->start = 0
    [    2.332000] res[2]->end = 0
    [    2.336000] res[3]->start = 0
    [    2.344000] res[3]->end = 0
    [    2.348000] res[4]->start = 0
    [    2.352000] res[4]->end = 0
    [    2.360000] res[5]->start = 0
    [    2.364000] res[5]->end = 0
    [    2.372000] Switching to clocksource MIPS
    [    2.380000] NET: Registered protocol family 2
    [    2.388000] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
    [    2.404000] TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
    [    2.416000] TCP: Hash tables configured (established 2048 bind 2048)
    [    2.428000] TCP: reno registered
    [    2.436000] UDP hash table entries: 256 (order: 1, 8192 bytes)
    [    2.448000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
    [    2.460000] NET: Registered protocol family 1
    [    2.468000] RPC: Registered named UNIX socket transport module.
    [    2.480000] RPC: Registered udp transport module.
    [    2.488000] RPC: Registered tcp transport module.
    [    2.500000] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    2.512000] squashfs: version 4.0 (2009/01/31) Phillip Lougher
    [    2.524000] jffs2: version 2.2. (NAND) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
    [    2.544000] fuse init (API version 7.22)
    [    2.552000] msgmni has been set to 488
    [    2.560000] io scheduler noop registered (default)
    [    2.572000] reg_int_mask=0, INT_MASK= 0 
    [    2.580000] HSDMA_init
    [    2.584000] 
    [    2.584000]  hsdma_phy_tx_ring0 = 0x00c00000, hsdma_tx_ring0 = 0xa0c00000
    [    2.600000] 
    [    2.600000]  hsdma_phy_rx_ring0 = 0x00c04000, hsdma_rx_ring0 = 0xa0c04000
    [    2.616000] TX_CTX_IDX0 = 0
    [    2.624000] TX_DTX_IDX0 = 0
    [    2.628000] RX_CRX_IDX0 = 3ff
    [    2.636000] RX_DRX_IDX0 = 0
    [    2.640000] set_fe_HSDMA_glo_cfg
    [    2.648000] HSDMA_GLO_CFG = 465
    [    2.652000] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
    [    2.668000] serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
    [    2.680000] serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
    [    2.692000] Ralink gpio driver initialized
    [    2.704000] brd: module loaded
    [    2.712000] flash manufacture id: c2, device id 20 19
    [    2.724000] MX25L25635E(c2 2019c220) (32768 Kbytes)
    [    2.732000] mtd .name = raspi, .size = 0x02000000 (32M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
    [    2.752000] Creating 12 MTD partitions on "raspi":
    [    2.760000] 0x000000000000-0x000002000000 : "ALL"
    [    2.772000] 0x000000000000-0x000000030000 : "Bootloader"
    [    2.784000] 0x000000030000-0x000000040000 : "Config"
    [    2.792000] 0x000000040000-0x000000050000 : "Factory"
    [    2.804000] 0x000000050000-0x000001850000 : "firmware"
    [    2.812000] 0x000000050000-0x000000a50000 : "kernel"
    [    2.824000] 0x000000a50000-0x000001850000 : "rootfs"
    [    2.836000] 0x000001850000-0x000001c50000 : "tm_pattern"
    [    2.844000] 0x000001c50000-0x000001d50000 : "tm_key"
    [    2.856000] 0x000001d50000-0x000001e00000 : "nvram"
    [    2.868000] 0x000001e00000-0x000002000000 : "rootfs_data"
    [    2.876000] 0x000000050000-0x000001d50000 : "all_fw_tm"
    [    2.888000] PPP generic driver version 2.4.2
    [    2.896000] PPP BSD Compression module registered
    [    2.908000] PPP MPPE Compression module registered
    [    2.916000] NET: Registered protocol family 24
    [    2.924000] PPTP driver version 0.8.5
    [    2.932000] register mt_drv
    [    2.948000] 
    [    2.948000] 
    [    2.948000] === pAd = c0201000, size = 3858008 ===
    [    2.948000] 
    [    2.968000] PciHif.CSRBaseAddress =0xc0100000, csr_addr=0xc0100000!
    [    2.988000] RTMPInitPCIeDevice():device_id=0x7615
    [    3.000000] DriverOwn()::Try to Clear FW Own...
    [    3.304000] DriverOwn()::Success to clear FW Own
    [    3.312000] mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
    [    3.328000] mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
    [    3.336000] RtmpChipOpsHook(492): Not support for HIF_MT yet! MACVersion=0x0
    [    3.352000] mt7615_init()-->
    [    3.356000] Use 1st iPAiLNA default bin.
    [    3.364000] Use 0st /etc_ro/wlan/MT7615E_EEPROM1.bin default bin.
    [    3.376000] <--mt7615_init()
    [    3.384000] ChipOpsMCUHook
    [    3.396000] cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
    [    3.412000] cut_through_token_list_init(): 8f72e208,8f72e208
    [    3.424000] cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
    [    3.436000] cut_through_token_list_init(): 8f72e218,8f72e218
    [    3.448000] <-- RTMPAllocTxRxRingMemory, Status=0
    [    3.468000] 
    [    3.468000] 
    [    3.468000] === pAd = c0701000, size = 3858008 ===
    [    3.468000] 
    [    3.488000] PciHif.CSRBaseAddress =0xc0600000, csr_addr=0xc0600000!
    [    3.512000] RTMPInitPCIeDevice():device_id=0x7615
    [    3.520000] DriverOwn()::Try to Clear FW Own...
    [    3.824000] DriverOwn()::Success to clear FW Own
    [    3.836000] mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
    [    3.848000] mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
    [    3.860000] RtmpChipOpsHook(492): Not support for HIF_MT yet! MACVersion=0x0
    [    3.872000] mt7615_init()-->
    [    3.880000] Use 2nd iPAiLNA default bin.
    [    3.888000] Use 1st /etc_ro/wlan/MT7615E_EEPROM2.bin default bin.
    [    3.900000] <--mt7615_init()
    [    3.904000] ChipOpsMCUHook
    [    3.916000] cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
    [    3.932000] cut_through_token_list_init(): 8ecc5388,8ecc5388
    [    3.944000] cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
    [    3.960000] cut_through_token_list_init(): 8ecc5398,8ecc5398
    [    3.972000] skb_free start address is 0x8edf26cc.
    [   19.352000] free_txd: 00cb0010, ei_local->cpu_ptr: 00CB0000
    [   19.364000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   19.372000] ----------------+---------+--------
    [   19.384000]      0xa0cb0000 0x00CB0000 0x00CB0000
    [   19.392000] 
    [   19.392000] phy_qrx_ring = 0x00caa000, qrx_ring = 0xa0caa000
    [   19.408000] 
    [   19.408000] phy_rx_ring0 = 0x00cac000, rx_ring[0] = 0xa0cac000
    [   19.444000] MT7530 Reset Completed!!
    [   19.456000] change HW-TRAP to 0x117c8f
    [   19.464000] set LAN/WAN WLLLL
    [   19.476000] GMAC1_MAC_ADRH -- : 0x000004ab
    [   19.484000] GMAC1_MAC_ADRL -- : 0x18523283
    [   19.492000] GDMA2_MAC_ADRH -- : 0x000004ab
    [   19.500000] GDMA2_MAC_ADRL -- : 0x18523284
    [   19.512000] eth3: ===> VirtualIF_open
    [   19.516000] MT7621 GE2 link rate to 1G
    [   19.524000] CDMA_CSG_CFG = 81000000
    [   19.532000] GDMA1_FWD_CFG = 20710000
    [   19.540000] GDMA2_FWD_CFG = 20710000
    [   19.560000] eth3: ===> VirtualIF_open
    [   20.024000] eth3: ===> VirtualIF_close
    [   20.040000] ra2880stop()...Done
    [   20.044000] eth3: ===> VirtualIF_close
    [   20.056000] Free TX/RX Ring Memory!
    [   20.068000]  4:FFFFFFAB:18:52:32:FFFFFF83
    [   20.076000] Raeth v3.1 (Tasklet)
    [   20.088000] set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1
    [   20.104000] phy_free_head is 0xca8000!!!
    [   20.112000] phy_free_tail_phy is 0xca9ff0!!!
    [   20.120000] txd_pool=a0cb0000 phy_txd_pool=00CB0000
    [   20.128000] ei_local->skb_free start address is 0x8edf26cc.
    [   20.140000] free_txd: 00cb0010, ei_local->cpu_ptr: 00CB0000
    [   20.152000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   20.160000] ----------------+---------+--------
    [   20.168000]      0xa0cb0000 0x00CB0000 0x00CB0000
    [   20.180000] 
    [   20.180000] phy_qrx_ring = 0x00caa000, qrx_ring = 0xa0caa000
    [   20.196000] 
    [   20.196000] phy_rx_ring0 = 0x00cac000, rx_ring[0] = 0xa0cac000
    [   20.232000] MT7530 Reset Completed!!
    [   20.244000] change HW-TRAP to 0x117c8f
    [   20.252000] set LAN/WAN WLLLL
    [   20.264000] GMAC1_MAC_ADRH -- : 0x000004ab
    [   20.272000] GMAC1_MAC_ADRL -- : 0x18523283
    [   20.280000] eth3: ===> VirtualIF_open
    [   20.288000] MT7621 GE2 link rate to 1G
    [   20.288000] CDMA_CSG_CFG = 81000000
    [   20.288000] GDMA1_FWD_CFG = 20710000
    [   20.288000] GDMA2_FWD_CFG = 20710000
    [   20.316000] device eth2 entered promiscuous mode
    [   20.328000] br-lan: port 1(eth2) entered forwarding state
    [   20.340000] br-lan: port 1(eth2) entered forwarding state
    [   20.360000] eth3: ===> VirtualIF_open
    dnsmasq
    dnsmasq [br-lan]
    [   22.344000] br-lan: port 1(eth2) entered forwarding state
    UHTTP crt Checked
    main init
    main init
    page=[/setup/index.html]
    count=[43]
    page=[/setup/index.html]
    count=[43]
    [   26.328000] Ralink HW NAT Module Enabled
    [   26.336000] eth2 ifindex =4
    [   26.344000] eth3 ifindex =b
    [   27.840000] jffs2: notice: (2248) jffs2_build_xattr_subsystem: complete building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of xref (0 dead, 0 orphan) found.
    [   28.988000] jffs2: notice: (2369) jffs2_build_xattr_subsystem: complete building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of xref (0 dead, 0 orphan) found.
    NO COPY updated DPI
    0x007f
    [   30.108000] DriverOwn()::Return since already in Driver Own...
    [   30.124000] APWdsInitialize():WdsEntry[0]
    [   30.132000] APWdsInitialize():WdsEntry[1]
    [   30.140000] APWdsInitialize():WdsEntry[2]
    [   30.148000] APWdsInitialize():WdsEntry[3]
    [   30.160000] 
    [   30.160000] [Force Roam] => Force Roam Support = 0
    [   30.172000] RT_CfgSetMacAddress : invalid length (0)
    [   30.180000] E2pAccessMode=2
    [   30.188000] SSID[0]=elecom-523283, EdcaIdx=0
    [   30.196000] TriBandChGrp=0/0/0/0
    [   30.204000] cfg_mode=14
    [   30.212000] cfg_mode=14
    [   30.216000] wmode_band_equal(): Band Equal!
    [   30.224000] BandSteering=0
    [   30.232000] BndStrgBssIdx=
    [   30.236000] [TxPower] BAND0: 100 
    [   30.244000] [SKUenable] BAND0: 1 
    [   30.252000] [PERCENTAGEenable] BAND0: 1 
    [   30.260000] [BFBACKOFFenable] BAND0: 1 
    [   30.268000] CalCacheApply = 0 
    [   30.272000] APEdca0
    [   30.280000] APEdca1
    [   30.284000] APEdca2
    [   30.288000] APEdca3
    [   30.296000] APSDCapable[0]=0
    [   30.300000] APSDCapable[1]=0
    [   30.308000] APSDCapable[2]=0
    [   30.312000] APSDCapable[3]=0
    [   30.320000] APSDCapable[4]=0
    [   30.324000] APSDCapable[5]=0
    [   30.332000] APSDCapable[6]=0
    [   30.336000] APSDCapable[7]=0
    [   30.344000] APSDCapable[8]=0
    [   30.348000] APSDCapable[9]=0
    [   30.352000] APSDCapable[10]=0
    [   30.360000] APSDCapable[11]=0
    [   30.364000] APSDCapable[12]=0
    [   30.372000] APSDCapable[13]=0
    [   30.376000] APSDCapable[14]=0
    [   30.384000] APSDCapable[15]=0
    [   30.388000] default ApCliAPSDCapable[0]=0
    [   30.400000] default ApCliAPSDCapable[1]=0
    [   30.408000] DfsZeroWait Support=0/0 
    [   30.416000] DfsZeroWaitCacTime=0/0 
    [   30.464000] rtmp_read_wds_from_file(): WDS Profile
    [   30.472000] APWdsInitialize():WdsEntry[0]
    [   30.480000] APWdsInitialize():WdsEntry[1]
    [   30.488000] APWdsInitialize():WdsEntry[2]
    [   30.496000] APWdsInitialize():WdsEntry[3]
    [   30.504000] WDS-Enable mode=0
    [   30.512000] AndesSendCmdMsg: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD
    [   30.536000] HT: WDEV[0] Ext Channel = ABOVE
    [   30.548000] HT: greenap_cap = 0
    [   30.608000] IcapMode = 0
    [   30.624000] WtcSetMaxStaNum: MaxStaNum:103, BssidNum:1, WdsNum:4, ApcliNum:2, MaxNumChipRept:16, MinMcastWcid:125
    [   30.644000] Top Init Done!
    [   30.648000] Use alloc_skb
    [   30.648000] tdts: module license 'Proprietary' taints kernel.
    [   30.648000] Disabling lock debugging due to kernel taint
    [   30.680000] RX[0] DESC a0ca4000 size = 16384
    [   30.680000] Init chrdev /dev/detector with major 190
    [   30.680000] tdts: tcp_conn_max = 4000
    [   30.680000] 
    [   30.680000] tdts: tcp_conn_timeout = 300 sec
    [   30.680000] 
    [   30.720000] RX[1] DESC a0ca2000 size = 8192
    [   30.732000] Hif Init Done!
    [   30.740000] ctl->txq = c0aa9e6c
    [   30.744000] ctl->rxq = c0aa9e78
    [   30.752000] ctl->ackq = c0aa9e84
    [   30.756000] ctl->kickq = c0aa9e90
    [   30.764000] ctl->tx_doneq = c0aa9e9c
    [   30.772000] ctl->rx_doneq = c0aa9ea8
    [   30.780000] mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
    [   30.792000] mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
    [   30.808000] AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
    [   30.820000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   30.832000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   30.844000] 20170809192718a
    [   30.852000] 
    [   30.852000] platform = 
    [   30.860000] ALPS
    [   30.864000] hw/sw version = 
    [   30.868000] 8a108a10
    [   30.872000] patch version = 
    [   30.880000] 00000010
    [   30.884000] Patch SEM Status=2
    [   30.888000] MtCmdPatchSemGet:(ret = 0)
    [   30.896000] 
    [   30.896000] Patch is not ready && get semaphore success, SemStatus(2)
    [   30.912000] EventGenericEventHandler: CMD Success
    [   30.924000] MtCmdAddressLenReq:(ret = 0)
    [   30.932000] MtCmdPatchFinishReq
    [   30.948000] EventGenericEventHandler: CMD Success
    [   30.960000] Send checksum req..
    [   30.964000] Patch SEM Status=3
    [   30.972000] MtCmdPatchSemGet:(ret = 0)
    [   30.980000] 
    [   30.980000] Release patch semaphore, SemStatus(3)
    [   30.992000] AndesMTEraseRomPatch
    [   30.996000] WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
    [   30.996000] SHN Release Version: 1.0.0 RELS_0003
    [   30.996000] UDB Core Version: 0.2.18
    [   30.996000] Init chrdev /dev/idpfw with major 191
    [   31.036000] AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
    [   31.048000] Build Date:_201708190346
    [   31.056000] Build Date:_201708190346
    [   31.064000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   31.072000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   31.088000] EventGenericEventHandler: CMD Success
    [   31.096000] MtCmdAddressLenReq:(ret = 0)
    [   31.108000] EventGenericEventHandler: CMD Success
    [   31.120000] MtCmdAddressLenReq:(ret = 0)
    [   31.128000] IDPfw: IDPfw is ready
    [   31.128000] MtCmdFwStartReq: override = 1, address = 540672
    [   31.128000] EventGenericEventHandler: CMD Success
    [   31.128000] Build Date:_201707211524
    [   31.128000] EventGenericEventHandler: CMD Success
    [   31.128000] MtCmdAddressLenReq:(ret = 0)
    [   31.128000] MtCmdFwStartReq: override = 4, address = 0
    [   31.180000] EventGenericEventHandler: CMD Success
    [   31.196000] sizeof forward pkt param = 192
    Running license control..waiting 25 second ...
    [   31.236000] WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
    [   31.248000] MCU Init Done!
    [   31.252000] efuse_probe: efuse = 10000212
    [   31.260000] RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
    [   31.272000] RtmpEepromGetDefault::e2p_dafault=1
    [   31.280000] RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
    [   31.296000] NVM is FLASH mode. dev_idx [1] FLASH OFFSET [0x8000]
    [   31.320000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   31.336000] MtCmdSetTxLpfCal:(ret = 0)
    [   31.344000] MtCmdSetTxIqCal:(ret = 0)
    [   31.352000] MtCmdSetTxDcCal:(ret = 0)
    [   31.360000] MtCmdSetRxFiCal:(ret = 0)
    [   31.368000] MtCmdSetRxFdCal:(ret = 0)
    [   31.372000] MtCmdSetRxFdCal:(ret = 0)
    [   31.380000] MtCmdSetRxFdCal:(ret = 0)
    [   31.388000] MtCmdSetRxFdCal:(ret = 0)
    [   31.396000] MtCmdSetRxFdCal:(ret = 0)
    [   31.404000] MtCmdSetRxFdCal:(ret = 0)
    [   31.412000] MtCmdSetRxFdCal:(ret = 0)
    [   31.416000] MtCmdSetRxFdCal:(ret = 0)
    [   31.424000] MtCmdSetRxFdCal:(ret = 0)
    [   31.432000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   31.984000] Country Region from e2p = 101
    [   31.992000] mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
    [   32.004000] mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
    [   32.020000] mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
    [   32.032000] rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
    [   32.044000] RTMPReadTxPwrPerRate(1381): Don't Support this now!
    [   32.056000] RcRadioInit(): DbdcMode=0, ConcurrentBand=1
    [   32.068000] RcRadioInit(): pRadioCtrl=8ecc6438,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
    [   32.084000] Band Rf: 1, Phy Mode: 2
    [   32.092000] AntCfgInit(2766): Not support for HIF_MT yet!
    [   32.104000] MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
    [   32.144000] MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
    [   32.228000] EEPROM Init Done!
    [   32.232000] mt_mac_init()-->
    [   32.240000] mt_mac_pse_init(2750): Don't Support this now!
    [   32.248000] mt7615_init_mac_cr()-->
    [   32.256000] mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
    [   32.268000] MtAsicSetMacMaxLen(1300): Not finish Yet!
    [   32.276000] 
    [   32.432000] ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
    [   32.448000] MtCmdSetMacTxRx:(ret = 0)
    [   32.456000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   32.472000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   32.484000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   32.500000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   32.512000] MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   32.528000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   32.748000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   32.764000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   32.772000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   32.792000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   32.800000] MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   32.820000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   33.040000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   33.056000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   33.064000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   33.084000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   33.092000] MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   33.112000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   33.400000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   33.416000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   33.424000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   33.444000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   33.452000] MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   33.472000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   33.692000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   33.708000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   33.716000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   33.736000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   33.744000] MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   33.764000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   34.004000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   34.020000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.028000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   34.048000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   34.056000] MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   34.076000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   34.436000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   34.452000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.460000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   34.480000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   34.488000] MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   34.508000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   34.848000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   34.864000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.872000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   34.892000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   34.900000] MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   34.920000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   35.140000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   35.156000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.164000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   35.184000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.192000] MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   35.212000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   35.468000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   35.484000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.492000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   35.512000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.524000] MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   35.540000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   35.872000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   35.888000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.896000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   35.916000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.928000] MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   35.944000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   36.288000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   36.304000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   36.312000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   36.332000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   36.344000] MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   36.360000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   36.764000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   36.780000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   36.788000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   36.808000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   36.820000] MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   36.836000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   37.056000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   37.072000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   37.080000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   37.100000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   37.112000] MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   37.128000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   37.428000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   37.444000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   37.452000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   37.472000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   37.484000] MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   37.500000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   37.848000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   37.864000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   37.872000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   37.892000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   37.904000] MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   37.920000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   38.324000] ====================================================================
    [   38.336000] Channel  36 : Busy Time =   1420, Skip Channel = FALSE, BwCap = TRUE
    [   38.352000] Channel  40 : Busy Time =    594, Skip Channel = FALSE, BwCap = TRUE
    [   38.368000] Channel  44 : Busy Time =    721, Skip Channel = FALSE, BwCap = TRUE
    [   38.380000] Channel  48 : Busy Time =    990, Skip Channel = FALSE, BwCap = TRUE
    [   38.396000] Channel  52 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   38.412000] Channel  56 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   38.424000] Channel  60 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   38.440000] Channel  64 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   38.456000] Channel 100 : Busy Time =    301, Skip Channel = FALSE, BwCap = TRUE
    [   38.468000] Channel 104 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   38.484000] Channel 108 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   38.500000] Channel 112 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   38.512000] Channel 116 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   38.528000] Channel 120 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   38.544000] Channel 124 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   38.560000] Channel 128 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   38.572000] ====================================================================
    [   38.588000] Rule 3 Channel Busy time value : Select Primary Channel 52 
    [   38.600000] Rule 3 Channel Busy time value : Min Channel Busy = 0
    [   38.612000] Rule 3 Channel Busy time value : BW = 80
    [   38.624000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 49,Channel = 52  
    [   38.644000] ApAutoChannelAtBootUp Force Roam Support = 0
    [   38.732000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=52
    [   38.748000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=49/49, support 19 channels
    [   38.764000] Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
    [   38.776000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   38.776000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   38.804000] bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
    [   38.940000]  [RadarStateCheck]Set into RD_SILENCE_MODE!  
    [   38.964000] MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 1, BandIdx: 0
    [   38.976000] MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0
    [   38.992000] MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 0
    [   39.004000] mt7615_bbp_adjust():rf_bw=2, ext_ch=1, PrimCh=52, HT-CentCh=54, VHT-CentCh=58
    [   39.020000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   39.036000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   39.048000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   39.068000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   39.076000] MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   39.092000] BW = 2,TXStream = 4, RXStream = 4, scan(0)
    [   39.124000] ap_phy_rrm_init_byRf(): AP Set CentralFreq at 58(Prim=52, HT-CentCh=54, VHT-CentCh=58, BBP_BW=2)
    [   39.144000] [WrapDfsRadarDetectStart]: Band0Ch is 52
    [   39.152000] [WrapDfsRadarDetectStart]: Band1Ch is 0
    [   39.176000] LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
    [   39.188000] MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
    [   39.200000] MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
    [   39.212000] MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
    [   39.224000] ap_ftkd> Initialize FT KDP Module...
    [   39.236000] Main bssid = 04:ab:18:52:32:86
    [   39.244000] AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
    [   39.252000] MtCmdSetMacTxRx:(ret = 0)
    [   39.260000] MCS Set = ff ff ff ff 01
    [   39.268000]  Force Roam Support = 0
    [   39.836000] RT_CfgSetMacAddress : invalid length (0)
    [   39.848000] E2pAccessMode=2
    [   39.852000] SSID[0]=elecom-523283, EdcaIdx=0
    [   39.864000] TriBandChGrp=0/0/0/0
    [   39.872000] cfg_mode=9
    [   39.876000] cfg_mode=9
    [   39.880000] wmode_band_equal(): Band Equal!
    [   39.888000] BandSteering=0
    [   39.896000] BndStrgBssIdx=
    [   39.900000] [TxPower] BAND0: 100 
    [   39.908000] [SKUenable] BAND0: 1 
    [   39.912000] [PERCENTAGEenable] BAND0: 1 
    [   39.920000] [BFBACKOFFenable] BAND0: 1 
    [   39.928000] CalCacheApply = 0 
    [   39.936000] APEdca0
    [   39.940000] APEdca1
    [   39.944000] APEdca2
    [   39.952000] APEdca3
    [   39.956000] APSDCapable[0]=0
    [   39.964000] APSDCapable[1]=0
    [   39.968000] APSDCapable[2]=0
    [   39.976000] APSDCapable[3]=0
    [   39.980000] APSDCapable[4]=0
    [   39.984000] APSDCapable[5]=0
    [   39.992000] APSDCapable[6]=0
    [   39.996000] APSDCapable[7]=0
    [   40.004000] APSDCapable[8]=0
    [   40.008000] APSDCapable[9]=0
    [   40.016000] APSDCapable[10]=0
    [   40.020000] APSDCapable[11]=0
    [   40.028000] APSDCapable[12]=0
    [   40.032000] APSDCapable[13]=0
    [   40.036000] APSDCapable[14]=0
    [   40.044000] APSDCapable[15]=0
    [   40.048000] default ApCliAPSDCapable[0]=0
    [   40.056000] default ApCliAPSDCapable[1]=0
    [   40.068000] DfsZeroWait Support=0/0 
    [   40.076000] DfsZeroWaitCacTime=0/0 
    [   40.108000] rtmp_read_wds_from_file(): WDS Profile
    [   40.120000] APWdsInitialize():WdsEntry[0]
    [   40.128000] APWdsInitialize():WdsEntry[1]
    [   40.136000] APWdsInitialize():WdsEntry[2]
    [   40.144000] APWdsInitialize():WdsEntry[3]
    [   40.152000] WDS-Enable mode=0
    [   40.160000] AndesSendCmdMsg: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD
    [   40.180000] :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
    [   40.180000] HT: WDEV[0] Ext Channel = ABOVE
    [   40.180000] HT: greenap_cap = 0
    [   40.216000] IcapMode = 0
    [   40.228000] WtcSetMaxStaNum: MaxStaNum:103, BssidNum:1, WdsNum:4, ApcliNum:2, MaxNumChipRept:16, MinMcastWcid:125
    [   40.248000] Top Init Done!
    [   40.252000] Use alloc_skb
    [   40.260000] RX[0] DESC a0c14000 size = 16384
    [   40.268000] RX[1] DESC a0c12000 size = 8192
    [   40.280000] Hif Init Done!
    [   40.284000] ctl->txq = c05a9e6c
    [   40.292000] ctl->rxq = c05a9e78
    [   40.296000] ctl->ackq = c05a9e84
    [   40.304000] ctl->kickq = c05a9e90
    [   40.312000] ctl->tx_doneq = c05a9e9c
    [   40.316000] ctl->rx_doneq = c05a9ea8
    [   40.324000] mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
    [   40.340000] mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
    [   40.352000] AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
    [   40.368000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   40.376000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   40.392000] 20170809192718a
    [   40.396000] 
    [   40.400000] platform = 
    [   40.404000] ALPS
    [   40.408000] hw/sw version = 
    [   40.416000] 8a108a10
    [   40.420000] patch version = 
    [   40.424000] 00000010
    [   40.428000] Patch SEM Status=2
    [   40.436000] MtCmdPatchSemGet:(ret = 0)
    [   40.444000] 
    [   40.444000] Patch is not ready && get semaphore success, SemStatus(2)
    [   40.460000] EventGenericEventHandler: CMD Success
    [   40.468000] MtCmdAddressLenReq:(ret = 0)
    [   40.476000] MtCmdPatchFinishReq
    [   40.492000] EventGenericEventHandler: CMD Success
    [   40.504000] Send checksum req..
    [   40.508000] Patch SEM Status=3
    [   40.516000] MtCmdPatchSemGet:(ret = 0)
    [   40.524000] 
    [   40.524000] Release patch semaphore, SemStatus(3)
    [   40.536000] AndesMTEraseRomPatch
    [   40.540000] WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
    [   40.552000] AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
    [   40.564000] Build Date:_201708190346
    [   40.572000] Build Date:_201708190346
    [   40.580000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   40.592000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   40.604000] EventGenericEventHandler: CMD Success
    [   40.612000] MtCmdAddressLenReq:(ret = 0)
    [   40.628000] EventGenericEventHandler: CMD Success
    [   40.636000] MtCmdAddressLenReq:(ret = 0)
    [   40.644000] MtCmdFwStartReq: override = 1, address = 540672
    [   40.656000] EventGenericEventHandler: CMD Success
    [   40.664000] Build Date:_201707211524
    [   40.672000] EventGenericEventHandler: CMD Success
    [   40.680000] MtCmdAddressLenReq:(ret = 0)
    [   40.692000] MtCmdFwStartReq: override = 4, address = 0
    [   40.752000] EventGenericEventHandler: CMD Success
    [   40.804000] WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
    [   40.816000] MCU Init Done!
    [   40.824000] efuse_probe: efuse = 10000212
    [   40.832000] RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
    [   40.840000] RtmpEepromGetDefault::e2p_dafault=1
    [   40.852000] RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
    [   40.864000] NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x0]
    [   40.888000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   40.908000] MtCmdSetTxLpfCal:(ret = 0)
    [   40.916000] MtCmdSetTxIqCal:(ret = 0)
    [   40.920000] MtCmdSetTxDcCal:(ret = 0)
    [   40.928000] MtCmdSetRxFiCal:(ret = 0)
    [   40.936000] MtCmdSetRxFdCal:(ret = 0)
    [   40.944000] MtCmdSetRxFdCal:(ret = 0)
    [   40.952000] MtCmdSetRxFdCal:(ret = 0)
    [   40.960000] MtCmdSetRxFdCal:(ret = 0)
    [   40.964000] MtCmdSetRxFdCal:(ret = 0)
    [   40.972000] MtCmdSetRxFdCal:(ret = 0)
    [   40.980000] MtCmdSetRxFdCal:(ret = 0)
    [   40.988000] MtCmdSetRxFdCal:(ret = 0)
    [   40.996000] MtCmdSetRxFdCal:(ret = 0)
    [   41.004000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   41.556000] Country Region from e2p = 101
    [   41.564000] mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
    [   41.576000] mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
    [   41.588000] mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
    [   41.604000] rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
    [   41.616000] RTMPReadTxPwrPerRate(1381): Don't Support this now!
    [   41.616000] br-lan: port 2(rai0) entered forwarding state
    [   41.640000] RcRadioInit(): DbdcMode=0, ConcurrentBand=1
    [   41.648000] RcRadioInit(): pRadioCtrl=8f72f438,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
    [   41.664000] Band Rf: 1, Phy Mode: 2
    [   41.672000] AntCfgInit(2766): Not support for HIF_MT yet!
    [   41.684000] MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
    [   41.696000] MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
    [   41.708000] EEPROM Init Done!
    [   41.716000] mt_mac_init()-->
    [   41.720000] mt_mac_pse_init(2750): Don't Support this now!
    [   41.732000] mt7615_init_mac_cr()-->
    [   41.740000] mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
    [   41.748000] MtAsicSetMacMaxLen(1300): Not finish Yet!
    [   41.760000] 
    [   41.916000] ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
    [   41.932000] MtCmdSetMacTxRx:(ret = 0)
    [   41.936000] mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200] 
    [   41.956000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   41.964000] mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   41.984000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   41.992000] MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0 
    [   42.012000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   42.232000] mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200] 
    [   42.248000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   42.256000] mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   42.276000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   42.284000] MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0 
    [   42.304000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   42.524000] mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200] 
    [   42.540000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   42.548000] mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   42.568000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   42.576000] MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0 
    [   42.596000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   42.892000] mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300] 
    [   42.908000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   42.916000] mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   42.936000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   42.944000] MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0 
    [   42.964000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   43.340000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   43.356000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.364000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   43.384000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.392000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   43.412000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   43.632000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   43.648000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.656000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   43.676000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.684000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   43.704000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   43.940000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   43.956000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.964000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   43.984000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.992000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   44.012000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   44.368000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   44.384000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.392000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   44.412000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.420000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   44.440000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   44.848000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   44.864000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.872000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   44.892000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.900000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   44.920000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   45.284000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   45.300000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.308000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   45.328000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.336000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   45.356000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   45.524000] [WrapDfsRddReportHandle]:  Radar detected !!!!!!!!!!!!!!!!!
    [   45.536000] [WrapDfsRddReportHandle]:  ucRddIdx: 0
    [   45.544000] [WrapDfsRddReportHandle]PrimCh: 40, Band0Ch:40, Band1Ch:0
    [   45.556000]  [WrapDfsRddReportHandle] RD_SILENCE_MODE. Update Uniform Ch=40, Bw=2  
    [   45.576000] MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
    [   45.588000] WifiSysClose(), wdev idx = 0
    [   45.588000] ExtEventBeaconLostHandler::FW LOG, Beacon lost (04:ab:18:52:32:86), Reason 0x10
    [   45.588000]   Beacon lost - AP disabled!!!
    [   45.592000] WifiSysGetBssInfoState(): BssInfoIdx 0 not found!!!
    [   45.592000] WifiSysUpdateBssInfoState(): BssInfoIdx 0 not found!!!
    [   45.624000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   45.624000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.624000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   45.624000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.624000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   45.624000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   45.756000] ap_ftkd> Release FT KDP Module...
    [   45.764000] MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
    [   45.776000] MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
    [   45.788000] MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
    [   45.800000] WifiSysOpen(), wdev idx = 0
    [   45.808000] wdev_attr_update(): wdevId0 = 04:ab:18:52:32:86
    [   45.820000] [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
    [   45.832000] [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
    [   45.844000] 
    [   45.844000] [Force Roam] => Force Roam Support = 0
    [   45.856000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=40
    [   45.876000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=49/49, support 19 channels
    [   45.884000] ====================================================================
    [   45.884000] Channel   1 : Busy Time =   4205, Skip Channel = FALSE, BwCap = TRUE
    [   45.884000] Channel   2 : Busy Time =   3829, Skip Channel = FALSE, BwCap = TRUE
    [   45.884000] Channel   3 : Busy Time =   5569, Skip Channel = FALSE, BwCap = TRUE
    [   45.884000] Channel   4 : Busy Time =   6484, Skip Channel = FALSE, BwCap = TRUE
    [   45.884000] Channel   5 : Busy Time =   3384, Skip Channel = FALSE, BwCap = TRUE
    [   45.884000] Channel   6 : Busy Time =   4586, Skip Channel = FALSE, BwCap = TRUE
    [   45.884000] Channel   7 : Busy Time =   8446, Skip Channel = FALSE, BwCap = TRUE
    [   45.884000] Channel   8 : Busy Time =   2281, Skip Channel = FALSE, BwCap = TRUE
    [   45.884000] Channel   9 : Busy Time =   5482, Skip Channel = FALSE, BwCap = TRUE
    [   45.884000] Channel  10 : Busy Time =   1719, Skip Channel = FALSE, BwCap = TRUE
    [   45.884000] Channel  11 : Busy Time =   9830, Skip Channel = FALSE, BwCap = TRUE
    [   45.884000] ====================================================================
    [   45.884000] Rule 3 Channel Busy time value : Select Primary Channel 10 
    [   45.884000] Rule 3 Channel Busy time value : Min Channel Busy = 1719
    [   45.884000] Rule 3 Channel Busy time value : BW = 20
    [   45.884000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 14,Channel = 10  
    [   45.884000] ApAutoChannelAtBootUp Force Roam Support = 0
    [   45.884000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=10
    [   45.884000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=14/14, support 13 channels
    [   45.884000] Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
    [   45.888000] MtCmdSetMacTxRx:(ret = 0)
    [   45.888000] mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200] 
    [   45.888000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.888000] mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   45.888000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.888000] MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0 
    [   45.888000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   45.900000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.264000] mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300] 
    [   46.264000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.264000] mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   46.264000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.264000] MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0 
    [   46.264000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   46.272000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.460000] Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
    [   46.472000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   46.472000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   46.504000] bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
    [   46.608000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   46.624000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.632000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   46.652000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.652000]  [RadarStateCheck]Set into RD_NORMAL_MODE  
    [   46.652000] MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 1, BandIdx: 0
    [   46.652000] MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0
    [   46.652000] MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 0
    [   46.652000] mt7615_bbp_adjust():rf_bw=2, ext_ch=3, PrimCh=40, HT-CentCh=38, VHT-CentCh=42
    [   46.652000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   46.744000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   46.764000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.764000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   46.772000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.792000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   46.808000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.820000] MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   46.836000] BW = 2,TXStream = 4, RXStream = 4, scan(0)
    [   46.864000] ap_phy_rrm_init_byRf(): AP Set CentralFreq at 42(Prim=40, HT-CentCh=38, VHT-CentCh=42, BBP_BW=2)
    [   46.900000] [WrapDfsRadarDetectStart]: Band0Ch is 40
    [   46.908000] [WrapDfsRadarDetectStart]: Band1Ch is 0
    [   46.920000] LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
    [   46.932000] ap_ftkd> Initialize FT KDP Module...
    [   46.940000] Main bssid = 04:ab:18:52:32:86
    [   46.948000] MtCmdSetDfsTxStart:(ret = 0)
    [   47.348000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   47.364000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   47.372000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   47.392000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   47.400000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   47.420000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   47.440000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   47.476000] :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
    [   47.908000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   47.924000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   47.932000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   47.952000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   47.960000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   47.980000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   48.000000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   48.308000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   48.324000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   48.332000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   48.352000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   48.360000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   48.380000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   48.400000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   48.768000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   48.784000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   48.792000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   48.812000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   48.820000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   48.840000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   48.860000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   49.180000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   49.196000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   49.204000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   49.224000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   49.232000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   49.252000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   49.272000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   49.580000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   49.596000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   49.604000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   49.624000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   49.632000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   49.652000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   49.672000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   50.008000] mt7615_apply_dcoc() : reload Central CH [12] BW [0] from cetral freq [2467]  offset [2500] 
    [   50.024000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   50.032000] mt7615_apply_dpd() : reload Central CH [12] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   50.052000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   50.060000] MtCmdChannelSwitch: control_chl = 12,control_ch2=0, central_chl = 12 DBDCIdx= 0, Band= 0 
    [   50.080000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   50.100000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   50.408000] mt7615_apply_dcoc() : reload Central CH [13] BW [0] from cetral freq [2467]  offset [2500] 
    [   50.424000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   50.432000] mt7615_apply_dpd() : reload Central CH [13] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   50.452000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   50.460000] MtCmdChannelSwitch: control_chl = 13,control_ch2=0, central_chl = 13 DBDCIdx= 0, Band= 0 
    [   50.480000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   50.500000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   50.868000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   50.868000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   50.896000] bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 0,                 CmdBssInfoBmcRate.u2McTransmit = 0
    [   51.028000]  [RadarStateCheck]Set into RD_NORMAL_MODE  
    [   51.040000] MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 1, BandIdx: 0
    [   51.052000] MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0
    [   51.064000] MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 0
    [   51.076000] mt7615_bbp_adjust():rf_bw=0, ext_ch=0, PrimCh=10, HT-CentCh=10, VHT-CentCh=0
    [   51.092000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   51.112000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   51.120000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   51.140000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   51.148000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   51.168000] BW = 0,TXStream = 4, RXStream = 4, scan(0)
    [   51.200000] ap_phy_rrm_init_byRf(): AP Set CentralFreq at 10(Prim=10, HT-CentCh=10, VHT-CentCh=0, BBP_BW=0)
    [   51.232000] LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
    [   51.244000] MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
    [   51.256000] MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
    [   51.268000] MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
    [   51.284000] ap_ftkd> Initialize FT KDP Module...
    [   51.292000] Main bssid = 04:ab:18:52:32:85
    [   51.300000] AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
    [   51.308000] MtCmdSetMacTxRx:(ret = 0)
    [   51.316000] MCS Set = ff ff ff ff 01
    [   51.324000]  cap_vht_bw: 0, correct to cap_vht_bw
    [   51.384000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   51.392000]   MacTabMatchWCID = 0
    [   51.400000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   51.416000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   51.428000]   MacTabMatchWCID = 0
    [   51.436000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   51.452000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   51.464000]   MacTabMatchWCID = 0
    [   51.472000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   51.488000] Total allocated 4 WDS interfaces!
    [   51.500000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   51.516000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   51.536000] WtcSetMaxStaNum: MaxStaNum:103, BssidNum:1, WdsNum:4, ApcliNum:2, MaxNumChipRept:16, MinMcastWcid:125
    [   51.600000] red_is_enabled: set CR4/N9 RED Enable to 1.
    [   51.612000] cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
    [   51.624000] Correct apidx from 0 to 0 for WscUUIDInit
    [   51.632000] Generate UUID for apidx(0)
    [   51.640000] PpeDevRegHandler : ineterface ra0 register (1)
    [   51.716000] device ra0 entered promiscuous mode
    [   51.724000] br-lan: port 3(ra0) entered forwarding state
    [   51.736000] br-lan: port 3(ra0) entered forwarding state
    [   53.740000] br-lan: port 3(ra0) entered forwarding state
    [   54.084000] PpeDevRegHandler : ineterface apcli0 register (2)
    [   54.096000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   54.112000] WifiSysOpen(), wdev idx = 5
    [   54.120000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=10
    [   54.140000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=10
    [   54.156000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=14/14, support 13 channels
    [   54.176000] PpeDevRegHandler : ineterface apclii0 register (3)
    [   54.188000] WifiSysOpen(), wdev idx = 5
    [   54.196000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=40
    [   54.216000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=40
    [   54.232000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=49/49, support 19 channels
    [   54.524000] 
    [   54.524000]  Set_Led_Proc ==> arg = 00-00-00-00-02-00-00-00
    [   54.540000] 
    [   54.540000] Set_Led_Proc
    [   54.548000] 00
    [   54.548000] 00
    [   54.552000] 00
    [   54.556000] 00
    [   54.560000] 02
    [   54.564000] 00
    [   54.568000] 00
    [   54.568000] 00
    [   54.572000] AndesLedEnhanceOP: Success!
    [   54.624000] 
    [   54.624000]  Set_Led_Proc ==> arg = 00-00-00-00-02-00-00-00
    [   54.636000] 
    [   54.636000] Set_Led_Proc
    [   54.644000] 00
    [   54.648000] 00
    [   54.652000] 00
    [   54.656000] 00
    [   54.660000] 02
    [   54.660000] 00
    [   54.664000] 00
    [   54.668000] 00
    [   54.672000] AndesLedEnhanceOP: Success!
    [   54.916000] BndStrg_Init()
    BndStrg_SetInfFlags(): BSS(04:AB:18:52:32:85) set 2G Inf ra0 ready.
    BndStrg Enable Success
    
    [   54.948000] BndStrg_Init()
    [   54.948000] BndStrg_SetInfFlags(): BSS(04:AB:18:52:32:86) set 5G Inf rai0 ready.
    BndStrg Enable Success
    
    [   57.068000] BndStrg_InfStatusRsp:INF [ra0]STATUS QUERY ON
    [   57.080000] 
    [   57.080000] BndStrg_InfStatusRsp:INF [rai0]STATUS QUERY ON
    start ddns
    
    add_cron
    add_cron data
    [   59.112000] Send DISASSOC frame(3) with ra0
    [   59.120000] Send DISASSOC frame(3) with ra0
    FC start
    FC Disable
    
    

WN-AX1167GR2 / WN-DX1167RがKernel 5.4でstuckする問題メモ

2020/04/29 追記: 既に修正済み (ramips: mt7621: backport more pcie driver fixes · openwrt/openwrt@51c6b14)

– pcie有効

PCIe周りでブートが止まる


===================================================================
                MT7621   stage1 code 10:33:11 (ASIC)
                CPU=50000000 HZ BUS=16666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL3 FB_DL: 0x5, 1/0 = 557/467 15000000
PLL4 FB_DL: 0x8, 1/0 = 776/248 21000000
PLL2 FB_DL: 0x1b, 1/0 = 602/422 6D000000
do DDR setting..[00320381]
Apply DDR3 Setting...(use customer AC)
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
      --------------------------------------------------------------------------------
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000E:|    0    0    0    0    0    0    0    0    0    0    0    1    1    1    1    1
000F:|    0    0    0    0    0    0    1    1    1    1    1    1    1    1    1    1
0010:|    1    1    1    1    1    1    1    1    1    1    1    0    0    0    0    0
0011:|    1    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0
0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
rank 0 coarse = 16
rank 0 fine = 40
B:|    0    0    0    0    0    0    0    1    1    1    0    0    0    0    0    0
opt_dle value:8
DRAMC_R0DELDLY[018]=00002122
==================================================================
                RX      DQS perbit delay software calibration 
==================================================================
1.0-15 bit dq delay value
==================================================================
bit|     0  1  2  3  4  5  6  7  8  9
--------------------------------------
0 |    9 8 9 9 6 7 8 6 7 6 
10 |    9 8 9 9 7 9 
--------------------------------------

==================================================================
2.dqs window
x=pass dqs delay value (min~max)center 
y=0-7bit DQ of every group
input delay:DQS0 =34 DQS1 = 33
==================================================================
bit     DQS0     bit      DQS1
0  (1~66)33  8  (1~63)32
1  (1~66)33  9  (1~64)32
2  (2~66)34  10  (1~65)33
3  (1~66)33  11  (1~61)31
4  (1~64)32  12  (1~62)31
5  (1~67)34  13  (1~63)32
6  (1~65)33  14  (1~65)33
7  (1~68)34  15  (1~64)32
==================================================================
3.dq delay value last
==================================================================
bit|    0  1  2  3  4  5  6  7  8   9
--------------------------------------
0 |    10 9 9 10 8 7 9 6 8 7 
10 |    9 10 11 10 7 10 
==================================================================
==================================================================
     TX  perbyte calibration 
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000 
dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
DQ loop=15, cmp_err_1 = ffff0082
dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=1 
DQ loop=14, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=14,  finish count=2 
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
20,data:88
[EMI] DRAMC calibration passed

===================================================================
                MT7621   stage1 code done 
                CPU=50000000 HZ BUS=16666666 HZ
===================================================================


U-Boot 1.1.3 (Dec  9 2016 - 10:20:35)

Board: Ralink APSoC DRAM:  128 MB
relocate_code Pointer at: 87fac000

Config XHCI 40M PLL 
Allocate 16 byte aligned buffer: 87fdf010
Enable NFI Clock
# MTK NAND # : Use HW ECC
NAND ID [01 F1 80 1D 01]
Device found in MTK table, ID: 1f1, EXT_ID: 801d01
Support this Device in MTK table! 1f1 
select_chip
[NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
Signature matched and data read!
load_fact_bbt success 1023
load fact bbt success
[mtk_nand] probe successfully!
mtd->writesize=2048 mtd->oobsize=64,    mtd->erasesize=131072  devinfo.iowidth=8
....============================================ 
Ralink UBoot Version: 5.0.0.0
-------------------------------------------- 
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection 
DRAM_TYPE: DDR3 
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: NAND Flash
Date:Dec  9 2016  Time:10:20:35
============================================ 
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768 

 ##### The CPU freq = 880 MHZ #### 
 estimate memory size =128 Mbytes
#Reset_MT7530
set LAN/WAN WLLLL
.## Starting application at 0x81E00000 ...


Z-LOADER V1.24 | 12/09/2016 10:20:37


..Hit ESC key to stop autoboot: 1

Checking image 1...
   Image Name:   3.10(XBC.1)b10
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    7506867 Bytes =  7.2 MB
   Load Address: 80001000
   Entry Point:  80001000
...................................................................................................................   Verifying Combo Checksum ... ...................................................................................................................## Booting image at bc400000 ...
   Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 128

Starting kernel ...

[    0.000000] Linux version 5.4.28 (musashino205@Taiha.Net) (gcc version 8.4.0 (OpenWrt GCC 8.4.0 r0+12840-8cc9839c92)) #0 SMP Sun Apr 5 06:16:37 2020
[    0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[    0.000000] printk: bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[    0.000000] MIPS: machine is I-O DATA WN-AX1167GR2
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] VPE topology {2,2} total 4
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000]   HighMem  empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] percpu: Embedded 14 pages/cpu s26672 r8192 d22480 u57344
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 32480
[    0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
[    0.000000] Writing ErrCtl register=0000c001
[    0.000000] Readback ErrCtl register=0000c001
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 116048K/131072K available (5549K kernel code, 203K rwdata, 1208K rodata, 6276K init, 229K bss, 15024K reserved, 0K cma-reserved, 0K highmem)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] rcu: Hierarchical RCU implementation.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] NR_IRQS: 256
[    0.000000] random: get_random_bytes called from start_kernel+0x340/0x554 with crng_init=0
[    0.000000] CPU Clock: 880MHz
[    0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[    0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[    0.000009] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
[    0.015481] Calibrating delay loop... 583.68 BogoMIPS (lpj=1167360)
[    0.055821] pid_max: default: 32768 minimum: 301
[    0.065157] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.079561] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.097479] rcu: Hierarchical SRCU implementation.
[    0.107535] smp: Bringing up secondary CPUs ...
[    0.129503] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.129513] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.129525] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.129622] CPU1 revision is: 0001992f (MIPS 1004Kc)
[    0.144677] Synchronize counters for CPU 1: done.
[    0.220318] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.220327] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.220334] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.220391] CPU2 revision is: 0001992f (MIPS 1004Kc)
[    0.243144] Synchronize counters for CPU 2: done.
[    0.315731] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.315739] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.315747] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.315804] CPU3 revision is: 0001992f (MIPS 1004Kc)
[    0.330748] Synchronize counters for CPU 3: done.
[    0.390348] smp: Brought up 1 node, 4 CPUs
[    0.402614] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[    0.421919] futex hash table entries: 1024 (order: 3, 32768 bytes, linear)
[    0.435859] pinctrl core: initialized pinctrl subsystem
[    0.447624] NET: Registered protocol family 16
[    0.486592] clocksource: Switched to clocksource GIC
[    0.496979] random: fast init done
[    0.497538] NET: Registered protocol family 2
[    0.513019] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear)
[    0.529544] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.544733] TCP bind hash table entries: 1024 (order: 1, 8192 bytes, linear)
[    0.558748] TCP: Hash tables configured (established 1024 bind 1024)
[    0.571462] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
[    0.584347] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
[    0.598393] NET: Registered protocol family 1
[    0.606966] PCI: CLS 0 bytes, default 32
[    6.742558] 4 CPUs re-calibrate udelay(lpj = 1163264)
[    6.754161] workingset: timestamp_bits=14 max_order=15 bucket_order=1
[    6.778244] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    6.789727] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    6.811882] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    6.823219] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    6.834457] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    6.846298] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[    6.860280] printk: console [ttyS0] disabled
[    6.868715] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A
[    6.886659] printk: console [ttyS0] enabled
[    6.886659] printk: console [ttyS0] enabled
[    6.903203] printk: bootconsole [early0] disabled
[    6.903203] printk: bootconsole [early0] disabled
[    6.924134] mt7621-nand 1e003000.nand: Using programmed access timing: 31c07388
[    6.938978] nand: device found, Manufacturer ID: 0x01, Chip ID: 0xf1
[    6.951627] nand: AMD/Spansion S34ML01G2
[    6.959432] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
[    6.974505] mt7621-nand 1e003000.nand: ECC strength adjusted to 4 bits
[    6.987534] mt7621-nand 1e003000.nand: Using programmed access timing: 21005134
[    7.002087] mt7621-nand 1e003000.nand: Using programmed access timing: 21005134
[    7.016642] Scanning device for bad blocks
[    9.001152] 11 fixed-partitions partitions found on MTD device mt7621-nand
[    9.014845] Creating 11 MTD partitions on "mt7621-nand":
[    9.025428] 0x000000000000-0x000000100000 : "u-boot"
[    9.036590] 0x000000100000-0x000000200000 : "u-boot-env"
[    9.048276] 0x000000200000-0x000000300000 : "factory"
[    9.059423] 0x000000300000-0x000000400000 : "SecondBoot"
[    9.071150] 0x000000400000-0x000000800000 : "kernel"
[    9.082131] 0x000000800000-0x000003600000 : "ubi"
[    9.092822] 0x000003600000-0x000003700000 : "Config"
[    9.103819] 0x000003700000-0x000006900000 : "firmware_2"
[    9.115780] 0x000006900000-0x000006a00000 : "Config_2"
[    9.127170] 0x000006a00000-0x000006b00000 : "persist"
[    9.138320] 0x000006b00000-0x000007f80000 : "Backup"
[    9.150162] libphy: Fixed MDIO Bus: probed
[    9.184958] libphy: mdio: probed
[    9.191648] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module
[    9.205602] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 20
[    9.224369] mt7621-pci 1e140000.pcie: Parsing DT failed
[    9.237170] NET: Registered protocol family 10
[    9.247693] Segment Routing with IPv6
[    9.255116] NET: Registered protocol family 17
[    9.264287] 8021q: 802.1Q VLAN Support v1.8
[    9.274325] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module
[   10.075087] libphy: dsa slave smi: probed
[   10.094612] mt7530 mdio-bus:1f wan (uninitialized): PHY [dsa-0.0:00] driver [Generic PHY]
[   10.122622] mt7530 mdio-bus:1f lan4 (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY]
[   10.150618] mt7530 mdio-bus:1f lan3 (uninitialized): PHY [dsa-0.0:02] driver [Generic PHY]
[   10.178625] mt7530 mdio-bus:1f lan2 (uninitialized): PHY [dsa-0.0:03] driver [Generic PHY]
[   10.206624] mt7530 mdio-bus:1f lan1 (uninitialized): PHY [dsa-0.0:04] driver [Generic PHY]
[   10.270566] mt7530 mdio-bus:1f: configuring for fixed/rgmii link mode
[   10.894561] mt7530 mdio-bus:1f: Link is Up - 1Gbps/Full - flow control off
[   10.978593] DSA: tree 0 setup
[   10.984829] rt2880-pinmux pinctrl: pcie is already enabled
[   10.995766] mt7621-pci 1e140000.pcie: Error applying setting, reverse things back
[   11.010801] mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual port = 1)
[   11.025679] mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual port = 0)
[   11.140078] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
[   11.151191] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
[   11.261887] mt7621-pci 1e140000.pcie: pcie0 no card, disable it (RST & CLK)

– pcie0のみ無効

ブートはするがMT7615Dが接続されるpcie1が検出されない

変更内容

$ git diff HEAD
diff --git a/target/linux/ramips/dts/mt7621_iodata_wn-ax1167gr2.dts b/target/linux/ramips/dts/mt7621_iodata_wn-ax1167gr2.dts
index 251caf4250..46973a5257 100644
--- a/target/linux/ramips/dts/mt7621_iodata_wn-ax1167gr2.dts
+++ b/target/linux/ramips/dts/mt7621_iodata_wn-ax1167gr2.dts
@@ -16,6 +16,10 @@
        };
 };

+&pcie0 {
+       status = "disabled";
+};
+
 &pcie1 {
        wifi@0,0 {
                compatible = "mediatek,mt76";
===================================================================
                MT7621   stage1 code 10:33:11 (ASIC)
                CPU=50000000 HZ BUS=16666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL3 FB_DL: 0x5, 1/0 = 646/378 15000000
PLL4 FB_DL: 0x7, 1/0 = 556/468 1D000000
PLL2 FB_DL: 0x19, 1/0 = 598/426 65000000
do DDR setting..[00320381]
Apply DDR3 Setting...(use customer AC)
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
      --------------------------------------------------------------------------------
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000E:|    0    0    0    0    0    0    0    0    0    0    0    1    1    1    1    1
000F:|    0    0    0    0    0    0    1    1    1    1    1    1    1    1    1    1
0010:|    1    1    1    1    1    1    1    1    1    1    1    0    0    0    0    0
0011:|    1    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0
0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
rank 0 coarse = 16
rank 0 fine = 40
B:|    0    0    0    0    0    0    0    0    1    1    1    0    0    0    0    0
opt_dle value:9
DRAMC_R0DELDLY[018]=00002121
==================================================================
                RX      DQS perbit delay software calibration 
==================================================================
1.0-15 bit dq delay value
==================================================================
bit|     0  1  2  3  4  5  6  7  8  9
--------------------------------------
0 |    9 8 9 10 6 7 8 6 7 6 
10 |    9 8 9 9 7 9 
--------------------------------------

==================================================================
2.dqs window
x=pass dqs delay value (min~max)center 
y=0-7bit DQ of every group
input delay:DQS0 =33 DQS1 = 33
==================================================================
bit     DQS0     bit      DQS1
0  (1~64)32  8  (1~63)32
1  (0~64)32  9  (1~61)31
2  (2~64)33  10  (1~63)32
3  (1~65)33  11  (1~62)31
4  (1~65)33  12  (1~64)32
5  (1~66)33  13  (1~63)32
6  (1~63)32  14  (1~64)32
7  (1~66)33  15  (1~65)33
==================================================================
3.dq delay value last
==================================================================
bit|    0  1  2  3  4  5  6  7  8   9
--------------------------------------
0 |    10 9 9 10 6 7 9 6 8 8 
10 |    10 10 10 10 8 9 
==================================================================
==================================================================
     TX  perbyte calibration 
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000 
dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
DQ loop=15, cmp_err_1 = ffff0082
dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=1 
DQ loop=14, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=14,  finish count=2 
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
20,data:88
[EMI] DRAMC calibration passed

===================================================================
                MT7621   stage1 code done 
                CPU=50000000 HZ BUS=16666666 HZ
===================================================================


U-Boot 1.1.3 (Dec  9 2016 - 10:20:35)

Board: Ralink APSoC DRAM:  128 MB
relocate_code Pointer at: 87fac000

Config XHCI 40M PLL 
******************************
Software System Reset Occurred
******************************
Allocate 16 byte aligned buffer: 87fdf010
Enable NFI Clock
# MTK NAND # : Use HW ECC
NAND ID [01 F1 80 1D 01]
Device found in MTK table, ID: 1f1, EXT_ID: 801d01
Support this Device in MTK table! 1f1 
select_chip
[NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
Signature matched and data read!
load_fact_bbt success 1023
load fact bbt success
[mtk_nand] probe successfully!
mtd->writesize=2048 mtd->oobsize=64,    mtd->erasesize=131072  devinfo.iowidth=8
....============================================ 
Ralink UBoot Version: 5.0.0.0
-------------------------------------------- 
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection 
DRAM_TYPE: DDR3 
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: NAND Flash
Date:Dec  9 2016  Time:10:20:35
============================================ 
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768 

 ##### The CPU freq = 880 MHZ #### 
 estimate memory size =128 Mbytes
#Reset_MT7530
set LAN/WAN WLLLL
.## Starting application at 0x81E00000 ...


Z-LOADER V1.24 | 12/09/2016 10:20:37


..Hit ESC key to stop autoboot: 1

Checking image 1...
   Image Name:   3.10(XBC.1)b10
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    7506547 Bytes =  7.2 MB
   Load Address: 80001000
   Entry Point:  80001000
...................................................................................................................   Verifying Combo Checksum ... ...................................................................................................................## Booting image at bc400000 ...
   Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 128

Starting kernel ...

[    0.000000] Linux version 5.4.28 (musashino205@Taiha.Net) (gcc version 8.4.0 (OpenWrt GCC 8.4.0 r0+12840-8cc9839c92)) #0 SMP Sun Apr 5 13:18:45 2020
[    0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[    0.000000] printk: bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[    0.000000] MIPS: machine is I-O DATA WN-AX1167GR2
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] VPE topology {2,2} total 4
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000]   HighMem  empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] percpu: Embedded 14 pages/cpu s26672 r8192 d22480 u57344
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 32480
[    0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
[    0.000000] Writing ErrCtl register=0002e000
[    0.000000] Readback ErrCtl register=0002e000
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 116048K/131072K available (5549K kernel code, 203K rwdata, 1208K rodata, 6276K init, 229K bss, 15024K reserved, 0K cma-reserved, 0K highmem)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] rcu: Hierarchical RCU implementation.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] NR_IRQS: 256
[    0.000000] random: get_random_bytes called from start_kernel+0x340/0x554 with crng_init=0
[    0.000000] CPU Clock: 880MHz
[    0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[    0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[    0.000009] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
[    0.015486] Calibrating delay loop... 583.68 BogoMIPS (lpj=1167360)
[    0.055841] pid_max: default: 32768 minimum: 301
[    0.065183] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.079588] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.097639] rcu: Hierarchical SRCU implementation.
[    0.107728] smp: Bringing up secondary CPUs ...
[    0.118762] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.118773] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.118785] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.118886] CPU1 revision is: 0001992f (MIPS 1004Kc)
[    0.144910] Synchronize counters for CPU 1: done.
[    0.209841] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.209849] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.209857] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.209914] CPU2 revision is: 0001992f (MIPS 1004Kc)
[    0.243435] Synchronize counters for CPU 2: done.
[    0.305043] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.305051] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.305059] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.305117] CPU3 revision is: 0001992f (MIPS 1004Kc)
[    0.331039] Synchronize counters for CPU 3: done.
[    0.390641] smp: Brought up 1 node, 4 CPUs
[    0.402933] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[    0.422239] futex hash table entries: 1024 (order: 3, 32768 bytes, linear)
[    0.436180] pinctrl core: initialized pinctrl subsystem
[    0.447958] NET: Registered protocol family 16
[    0.487568] clocksource: Switched to clocksource GIC
[    0.497634] random: fast init done
[    0.498712] NET: Registered protocol family 2
[    0.513656] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear)
[    0.530181] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.545380] TCP bind hash table entries: 1024 (order: 1, 8192 bytes, linear)
[    0.559358] TCP: Hash tables configured (established 1024 bind 1024)
[    0.572101] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
[    0.584987] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
[    0.599035] NET: Registered protocol family 1
[    0.607618] PCI: CLS 0 bytes, default 32
[    6.747539] 4 CPUs re-calibrate udelay(lpj = 1163264)
[    6.759028] workingset: timestamp_bits=14 max_order=15 bucket_order=1
[    6.781619] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    6.793129] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    6.814739] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    6.826013] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    6.837241] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    6.848902] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[    6.862660] printk: console [ttyS0] disabled
[    6.871121] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A
[    6.889052] printk: console [ttyS0] enabled
[    6.889052] printk: console [ttyS0] enabled
[    6.905592] printk: bootconsole [early0] disabled
[    6.905592] printk: bootconsole [early0] disabled
[    6.926326] mt7621-nand 1e003000.nand: Using programmed access timing: 31c07388
[    6.941183] nand: device found, Manufacturer ID: 0x01, Chip ID: 0xf1
[    6.953852] nand: AMD/Spansion S34ML01G2
[    6.961671] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
[    6.976759] mt7621-nand 1e003000.nand: ECC strength adjusted to 4 bits
[    6.989798] mt7621-nand 1e003000.nand: Using programmed access timing: 21005134
[    7.004368] mt7621-nand 1e003000.nand: Using programmed access timing: 21005134
[    7.018942] Scanning device for bad blocks
[    9.008487] 11 fixed-partitions partitions found on MTD device mt7621-nand
[    9.022185] Creating 11 MTD partitions on "mt7621-nand":
[    9.032781] 0x000000000000-0x000000100000 : "u-boot"
[    9.043919] 0x000000100000-0x000000200000 : "u-boot-env"
[    9.055667] 0x000000200000-0x000000300000 : "factory"
[    9.066775] 0x000000300000-0x000000400000 : "SecondBoot"
[    9.078505] 0x000000400000-0x000000800000 : "kernel"
[    9.089521] 0x000000800000-0x000003600000 : "ubi"
[    9.100301] 0x000003600000-0x000003700000 : "Config"
[    9.111266] 0x000003700000-0x000006900000 : "firmware_2"
[    9.123175] 0x000006900000-0x000006a00000 : "Config_2"
[    9.134502] 0x000006a00000-0x000006b00000 : "persist"
[    9.145663] 0x000006b00000-0x000007f80000 : "Backup"
[    9.157397] libphy: Fixed MDIO Bus: probed
[    9.189915] libphy: mdio: probed
[    9.196580] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module
[    9.210415] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 20
[    9.229091] mt7621-pci 1e140000.pcie: Parsing DT failed
[    9.241689] NET: Registered protocol family 10
[    9.252234] Segment Routing with IPv6
[    9.259691] NET: Registered protocol family 17
[    9.268879] 8021q: 802.1Q VLAN Support v1.8
[    9.279010] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module
[   10.080064] libphy: dsa slave smi: probed
[   10.099609] mt7530 mdio-bus:1f wan (uninitialized): PHY [dsa-0.0:00] driver [Generic PHY]
[   10.127608] mt7530 mdio-bus:1f lan4 (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY]
[   10.155617] mt7530 mdio-bus:1f lan3 (uninitialized): PHY [dsa-0.0:02] driver [Generic PHY]
[   10.183613] mt7530 mdio-bus:1f lan2 (uninitialized): PHY [dsa-0.0:03] driver [Generic PHY]
[   10.211621] mt7530 mdio-bus:1f lan1 (uninitialized): PHY [dsa-0.0:04] driver [Generic PHY]
[   10.275557] mt7530 mdio-bus:1f: configuring for fixed/rgmii link mode
[   10.899547] mt7530 mdio-bus:1f: Link is Up - 1Gbps/Full - flow control off
[   10.983577] DSA: tree 0 setup
[   10.989778] rt2880-pinmux pinctrl: pcie is already enabled
[   11.000733] mt7621-pci 1e140000.pcie: Error applying setting, reverse things back
[   11.015843] mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual port = 0)
[   11.130454] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
[   11.241369] mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK)
[   11.255240] mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK)
[   11.269118] mt7621-pci 1e140000.pcie: Nothing is connected in virtual bridges. Exiting...
[   11.286603] UBI error: no valid UBI magic found inside mtd5
[   11.297775] hctosys: unable to open rtc device (rtc0)
[   11.330891] Freeing unused kernel memory: 6276K
[   11.339977] This architecture does not have kernel memory protection.
[   11.352808] Run /init as init process
[   11.400355] init: Console is alive
[   11.407378] init: - watchdog -
[   11.426047] kmodloader: loading kernel modules from /etc/modules-boot.d/*
[   11.444855] kmodloader: done loading kernel modules from /etc/modules-boot.d/*
[   11.463875] init: - preinit -
[   11.590833] mtk_soc_eth 1e100000.ethernet eth0: configuring for fixed/rgmii link mode
[   11.606977] mtk_soc_eth 1e100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
[   11.623884] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[   11.698943] random: jshn: uninitialized urandom read (4 bytes read)
[   11.757721] random: jshn: uninitialized urandom read (4 bytes read)
[   11.800132] random: jshn: uninitialized urandom read (4 bytes read)
[   12.011560] mt7530 mdio-bus:1f lan1: configuring for phy/gmii link mode
[   12.051710] 8021q: adding VLAN 0 to HW filter on device lan1
Press the [f] key and hit [enter] to enter failsafe mode
Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
[   16.274945] procd: - early -
[   16.280810] procd: - watchdog -
[   16.823707] procd: - watchdog -
[   16.830307] procd: - ubus -
[   16.841021] urandom_read: 5 callbacks suppressed
[   16.841032] random: ubusd: uninitialized urandom read (4 bytes read)
[   16.888103] random: ubusd: uninitialized urandom read (4 bytes read)
[   16.902047] procd: - init -
Please press Enter to activate this console.
[   17.196497] kmodloader: loading kernel modules from /etc/modules.d/*
[   17.215857] nat46: module (version 683fbd2b765506332a1af141545652bf58f03166) loaded.
[   17.244562] Loading modules backported from Linux version v5.4.27-0-g585e0cc08069
[   17.259588] Backport generated by backports.git v5.4.27-1-0-gf6e8852f
[   17.302039] xt_time: kernel timezone is -0000
[   17.377972] PPP generic driver version 2.4.2
[   17.387970] NET: Registered protocol family 24
[   17.388039] urngd: v1.0.2 started.
[   17.411303] kmodloader: done loading kernel modules from /etc/modules.d/*
[   17.539686] random: crng init done
[   88.076743] mtk_soc_eth 1e100000.ethernet eth0: Link is Down
[   88.096656] mtk_soc_eth 1e100000.ethernet eth0: configuring for fixed/rgmii link mode
[   88.112785] mtk_soc_eth 1e100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
[   88.183582] mt7530 mdio-bus:1f lan1: configuring for phy/gmii link mode
[   88.215799] 8021q: adding VLAN 0 to HW filter on device lan1
[   88.227356] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[   88.240546] br-lan: port 1(lan1) entered blocking state
[   88.251045] br-lan: port 1(lan1) entered disabled state
[   88.283587] device lan1 entered promiscuous mode
[   88.292803] device eth0 entered promiscuous mode
[   88.427757] mt7530 mdio-bus:1f lan2: configuring for phy/gmii link mode
[   88.467956] 8021q: adding VLAN 0 to HW filter on device lan2
[   88.480017] br-lan: port 2(lan2) entered blocking state
[   88.490496] br-lan: port 2(lan2) entered disabled state
[   88.551599] device lan2 entered promiscuous mode
[   88.703562] mt7530 mdio-bus:1f lan3: configuring for phy/gmii link mode
[   88.743733] 8021q: adding VLAN 0 to HW filter on device lan3
[   88.755508] br-lan: port 3(lan3) entered blocking state
[   88.765992] br-lan: port 3(lan3) entered disabled state
[   88.859584] device lan3 entered promiscuous mode
[   88.995563] mt7530 mdio-bus:1f lan4: configuring for phy/gmii link mode
[   89.035742] 8021q: adding VLAN 0 to HW filter on device lan4
[   89.047604] br-lan: port 4(lan4) entered blocking state
[   89.058037] br-lan: port 4(lan4) entered disabled state
[   89.175585] device lan4 entered promiscuous mode
[   89.323563] mt7530 mdio-bus:1f wan: configuring for phy/gmii link mode
[   89.363828] 8021q: adding VLAN 0 to HW filter on device wan
[   92.839574] mt7530 mdio-bus:1f lan2: Link is Up - 1Gbps/Full - flow control rx/tx
[   92.854552] br-lan: port 2(lan2) entered blocking state
[   92.865037] br-lan: port 2(lan2) entered forwarding state
[   92.923595] IPv6: ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready

– Kernel 4.14 (3ec70052c5d82ffbc8d13e597f2833a1c30bec54) にrevert

問題無し

===================================================================
                MT7621   stage1 code 10:33:11 (ASIC)
                CPU=50000000 HZ BUS=16666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL3 FB_DL: 0x5, 1/0 = 656/368 15000000
PLL4 FB_DL: 0x7, 1/0 = 544/480 1D000000
PLL2 FB_DL: 0x1a, 1/0 = 720/304 69000000
do DDR setting..[00320381]
Apply DDR3 Setting...(use customer AC)
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
      --------------------------------------------------------------------------------
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000E:|    0    0    0    0    0    0    0    0    0    0    0    1    1    1    1    1
000F:|    0    0    0    0    0    0    1    1    1    1    1    1    1    1    1    1
0010:|    1    1    1    1    1    1    1    1    1    1    1    0    0    0    0    0
0011:|    1    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0
0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
rank 0 coarse = 16
rank 0 fine = 40
B:|    0    0    0    0    0    0    0    0    1    1    1    0    0    0    0    0
opt_dle value:9
DRAMC_R0DELDLY[018]=00002021
==================================================================
                RX      DQS perbit delay software calibration 
==================================================================
1.0-15 bit dq delay value
==================================================================
bit|     0  1  2  3  4  5  6  7  8  9
--------------------------------------
0 |    10 9 9 10 6 7 8 6 7 6 
10 |    9 8 9 10 7 9 
--------------------------------------

==================================================================
2.dqs window
x=pass dqs delay value (min~max)center 
y=0-7bit DQ of every group
input delay:DQS0 =33 DQS1 = 32
==================================================================
bit     DQS0     bit      DQS1
0  (1~66)33  8  (1~61)31
1  (1~66)33  9  (1~61)31
2  (2~62)32  10  (1~62)31
3  (1~66)33  11  (1~61)31
4  (1~65)33  12  (1~64)32
5  (1~66)33  13  (1~63)32
6  (1~64)32  14  (1~63)32
7  (1~66)33  15  (1~64)32
==================================================================
3.dq delay value last
==================================================================
bit|    0  1  2  3  4  5  6  7  8   9
--------------------------------------
0 |    10 9 10 10 6 7 9 6 8 7 
10 |    10 9 9 10 7 9 
==================================================================
==================================================================
     TX  perbyte calibration 
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000 
dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
DQ loop=15, cmp_err_1 = ffff0082
dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=1 
DQ loop=14, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=14,  finish count=2 
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
20,data:88
[EMI] DRAMC calibration passed

===================================================================
                MT7621   stage1 code done 
                CPU=50000000 HZ BUS=16666666 HZ
===================================================================


U-Boot 1.1.3 (Dec  9 2016 - 10:20:35)

Board: Ralink APSoC DRAM:  128 MB
relocate_code Pointer at: 87fac000

Config XHCI 40M PLL 
******************************
Software System Reset Occurred
******************************
Allocate 16 byte aligned buffer: 87fdf010
Enable NFI Clock
# MTK NAND # : Use HW ECC
NAND ID [01 F1 80 1D 01]
Device found in MTK table, ID: 1f1, EXT_ID: 801d01
Support this Device in MTK table! 1f1 
select_chip
[NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
Signature matched and data read!
load_fact_bbt success 1023
load fact bbt success
[mtk_nand] probe successfully!
mtd->writesize=2048 mtd->oobsize=64,    mtd->erasesize=131072  devinfo.iowidth=8
....============================================ 
Ralink UBoot Version: 5.0.0.0
-------------------------------------------- 
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection 
DRAM_TYPE: DDR3 
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: NAND Flash
Date:Dec  9 2016  Time:10:20:35
============================================ 
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768 

 ##### The CPU freq = 880 MHZ #### 
 estimate memory size =128 Mbytes
#Reset_MT7530
set LAN/WAN WLLLL
.## Starting application at 0x81E00000 ...


Z-LOADER V1.24 | 12/09/2016 10:20:37


..Hit ESC key to stop autoboot: 1

Checking image 1...
   Image Name:   3.10(XBC.1)b10
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    7188163 Bytes =  6.9 MB
   Load Address: 80001000
   Entry Point:  80001000
..............................................................................................................   Verifying Combo Checksum ... ..............................................................................................................## Booting image at bc400000 ...
   Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 128

Starting kernel ...

[    0.000000] Linux version 4.14.172 (musashino205@Taiha.Net) (gcc version 8.4.0 (OpenWrt GCC 8.4.0 r0+12840-8cc9839c92)) #0 SMP Fri Apr 3 13:33:27 2020
[    0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[    0.000000] bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[    0.000000] MIPS: machine is I-O DATA WN-AX1167GR2
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 08000000 @ 00000000 (usable)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] VPE topology {2,2} total 4
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000]   HighMem  empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] random: get_random_bytes called from start_kernel+0x9c/0x4d8 with crng_init=0
[    0.000000] percpu: Embedded 14 pages/cpu s26064 r8192 d23088 u57344
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 32480
[    0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2
[    0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[    0.000000] Writing ErrCtl register=00032000
[    0.000000] Readback ErrCtl register=00032000
[    0.000000] Memory: 116880K/131072K available (4802K kernel code, 249K rwdata, 1052K rodata, 6236K init, 253K bss, 14192K reserved, 0K cma-reserved, 0K highmem)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] Hierarchical RCU implementation.
[    0.000000] NR_IRQS: 256
[    0.000000] CPU Clock: 880MHz
[    0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[    0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[    0.000009] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
[    0.015496] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
[    0.087829] pid_max: default: 32768 minimum: 301
[    0.097185] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.110208] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.126278] Hierarchical SRCU implementation.
[    0.135788] smp: Bringing up secondary CPUs ...
[    0.157722] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.157730] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.157741] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.157875] CPU1 revision is: 0001992f (MIPS 1004Kc)
[    0.205124] Synchronize counters for CPU 1: done.
[    0.281466] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.281475] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.281482] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.281555] CPU2 revision is: 0001992f (MIPS 1004Kc)
[    0.326039] Synchronize counters for CPU 2: done.
[    0.398585] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.398594] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.398604] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.398677] CPU3 revision is: 0001992f (MIPS 1004Kc)
[    0.445605] Synchronize counters for CPU 3: done.
[    0.505202] smp: Brought up 1 node, 4 CPUs
[    0.517391] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.536871] futex hash table entries: 1024 (order: 3, 32768 bytes)
[    0.549407] pinctrl core: initialized pinctrl subsystem
[    0.561084] NET: Registered protocol family 16
[    0.579260] pull PCIe RST: RALINK_RSTCTRL = 0
[    0.888232] release PCIe RST: RALINK_RSTCTRL = 7000000
[    0.898296] ***** Xtal 40MHz *****
[    0.905030] release PCIe RST: RALINK_RSTCTRL = 7000000
[    0.915236] Port 0 N_FTS = 1b102800
[    0.922135] Port 1 N_FTS = 1b102800
[    0.929060] Port 2 N_FTS = 1b102800
[    2.087472] PCIE0 no card, disable it(RST&CLK)
[    2.096162] PCIE2 no card, disable it(RST&CLK)
[    2.104963]  -> 20107f2
[    2.109813] PCIE1 enabled
[    2.114992] PCI host bridge /pcie@1e140000 ranges:
[    2.124519]  MEM 0x0000000060000000..0x000000006fffffff
[    2.134873]   IO 0x000000001e160000..0x000000001e16ffff
[    2.145243] PCI coherence region base: 0xbfbf8000, mask/settings: 0x60000000
[    2.168504] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    2.179800] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    2.191063] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    2.203751] PCI host bridge to bus 0000:00
[    2.211762] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[    2.225441] pci_bus 0000:00: root bus resource [io  0xffffffff]
[    2.237170] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[    2.250658] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[    2.266803] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.283185] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
[    2.296226] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
[    2.310040] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
[    2.323508] pci 0000:00:00.0: BAR 1: assigned [mem 0x60100000-0x6010ffff]
[    2.337000] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
[    2.351512] pci 0000:00:00.0: PCI bridge to [bus 01]
[    2.361328] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
[    2.376185] clocksource: Switched to clocksource GIC
[    2.387830] NET: Registered protocol family 2
[    2.397072] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[    2.410809] TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
[    2.423420] TCP: Hash tables configured (established 1024 bind 1024)
[    2.436185] UDP hash table entries: 256 (order: 1, 8192 bytes)
[    2.447688] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[    2.460349] NET: Registered protocol family 1
[    8.716166] 4 CPUs re-calibrate udelay(lpj = 2924544)
[    8.727689] Crashlog allocated RAM at address 0x3f00000
[    8.738333] workingset: timestamp_bits=14 max_order=15 bucket_order=1
[    8.759745] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    8.771252] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    8.794390] io scheduler noop registered
[    8.802068] io scheduler deadline registered (default)
[    8.812321] random: fast init done
[    8.819937] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[    8.833897] console [ttyS0] disabled
[    8.840943] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A
[    8.858884] console [ttyS0] enabled
[    8.858884] console [ttyS0] enabled
[    8.872675] bootconsole [early0] disabled
[    8.872675] bootconsole [early0] disabled
[    8.890644] MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error
[    8.904681] Enable NFI Clock
[    8.910425] # MTK NAND # : Use HW ECC
[    8.917740] Device found in MTK table, ID: 1f1, EXT_ID: 801d01
[    8.929353] Support this Device in MTK table! 1f1 
[    8.939082] [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
[    8.951951] nand: device found, Manufacturer ID: 0x01, Chip ID: 0xf1
[    8.964603] nand: AMD/Spansion NAND 128MiB 3,3V 8-bit
[    8.974662] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
[    8.989752] Scanning device for bad blocks
[    9.283424] 11 fixed-partitions partitions found on MTD device MT7621-NAND
[    9.297131] Creating 11 MTD partitions on "MT7621-NAND":
[    9.307724] 0x000000000000-0x000000100000 : "u-boot"
[    9.318610] 0x000000100000-0x000000200000 : "u-boot-env"
[    9.330148] 0x000000200000-0x000000300000 : "factory"
[    9.341189] 0x000000300000-0x000000400000 : "SecondBoot"
[    9.352714] 0x000000400000-0x000000800000 : "kernel"
[    9.363563] 0x000000800000-0x000003600000 : "ubi"
[    9.374267] 0x000003600000-0x000003700000 : "Config"
[    9.385092] 0x000003700000-0x000006900000 : "firmware_2"
[    9.397052] 0x000006900000-0x000006a00000 : "Config_2"
[    9.408243] 0x000006a00000-0x000006b00000 : "persist"
[    9.419251] 0x000006b00000-0x000007f80000 : "Backup"
[    9.430260] [mtk_nand] probe successfully!
[    9.439168] Signature matched and data read!
[    9.447676] load_fact_bbt success 1023
[    9.455907] libphy: Fixed MDIO Bus: probed
[    9.528741] libphy: mdio: probed
[   10.949400] mtk_soc_eth 1e100000.ethernet: loaded mt7530 driver
[   10.961905] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 20
[   10.981063] NET: Registered protocol family 10
[   10.991491] Segment Routing with IPv6
[   10.998951] NET: Registered protocol family 17
[   11.007883] 8021q: 802.1Q VLAN Support v1.8
[   11.019156] UBI error: no valid UBI magic found inside mtd5
[   11.030356] hctosys: unable to open rtc device (rtc0)
[   11.063299] Freeing unused kernel memory: 6236K
[   11.072369] This architecture does not have kernel memory protection.
[   11.097930] init: Console is alive
[   11.104907] init: - watchdog -
[   11.124467] kmodloader: loading kernel modules from /etc/modules-boot.d/*
[   11.142830] kmodloader: done loading kernel modules from /etc/modules-boot.d/*
[   11.166491] init: - preinit -
[   11.333924] mtk_soc_eth 1e100000.ethernet: PPE started
[   11.357189] random: procd: uninitialized urandom read (4 bytes read)
Press the [f] key and hit [enter] to enter failsafe mode
Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
[   12.822180] mtk_soc_eth 1e100000.ethernet eth0: port 3 link up
[   15.481869] mtk_soc_eth 1e100000.ethernet: 0x100 = 0x6060000c, 0x10c = 0x80818
[   15.503780] procd: - early -
[   15.509691] procd: - watchdog -
[   16.136308] procd: - watchdog -
[   16.142906] procd: - ubus -
[   16.153579] random: ubusd: uninitialized urandom read (4 bytes read)
[   16.206775] random: ubusd: uninitialized urandom read (4 bytes read)
[   16.219830] random: ubusd: uninitialized urandom read (4 bytes read)
[   16.233393] procd: - init -
Please press Enter to activate this console.
[   16.513934] kmodloader: loading kernel modules from /etc/modules.d/*
[   16.533085] nat46: module (version 683fbd2b765506332a1af141545652bf58f03166) loaded.
[   16.554273] ip6_tables: (C) 2000-2006 Netfilter Core Team
[   16.575636] Loading modules backported from Linux version v5.4.27-0-g585e0cc08069
[   16.590595] Backport generated by backports.git v5.4.27-1-0-gf6e8852f
[   16.606094] ip_tables: (C) 2000-2006 Netfilter Core Team
[   16.628009] nf_conntrack version 0.5.0 (2048 buckets, 8192 max)
[   16.674856] Netfilter messages via NETLINK v0.30.
[   16.700676] xt_time: kernel timezone is -0000
[   16.738196] urngd: v1.0.2 started.
[   16.755753] bus=0x1, slot = 0x0, irq=0x0
[   16.763675] PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
[   16.776569] mt7615e 0000:01:00.0: Invalid MAC address, using random address 8e:f7:91:ec:48:8a
[   16.805917] ctnetlink v0.93: registering with nfnetlink.
[   16.816694] mt7615e 0000:01:00.0: HW/SW Version: 0x8a108a10, Build Time: 20180518100604a
[   16.816694] 
[   16.819496] PPP generic driver version 2.4.2
[   16.846223] NET: Registered protocol family 24
[   16.853082] mt7615e 0000:01:00.0: N9 Firmware Version: 2.0, Build Time: 20200131181812
[   16.858395] kmodloader: done loading kernel modules from /etc/modules.d/*
[   16.882143] mt7615e 0000:01:00.0: CR4 Firmware Version: _reserved_, Build Time: 20190121161307
[   16.924946] random: crng init done
[   16.931853] random: 6 urandom warning(s) missed due to ratelimiting
[   33.423647] mtk_soc_eth 1e100000.ethernet: PPE started
[   33.440455] br-lan: port 1(eth0.1) entered blocking state
[   33.451322] br-lan: port 1(eth0.1) entered disabled state
[   33.462795] device eth0.1 entered promiscuous mode
[   33.472391] device eth0 entered promiscuous mode
[   33.485267] br-lan: port 1(eth0.1) entered blocking state
[   33.496106] br-lan: port 1(eth0.1) entered forwarding state
[   33.507612] IPv6: ADDRCONF(NETDEV_UP): br-lan: link is not ready
[   34.496820] IPv6: ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready

WRC-1167GS2-B

既にOpenWrtでサポート済みのWRC-1167GHBK2-Sとほぼ同程度の機能を持ち、価格設定も同程度であるから後継と思われ、以前より気になっていた機種。某フリマアプリで比較的安価に入手できた。
サポートのため弄っていくのでメモ。

Switch

zone WAN LAN
port
(WRC-1167GS2-B)
INTERNET LAN4 LAN3 LAN2 LAN1
port
(MT7530)
port0 port1 port2 port3 port4

MAC

未確認

  • LAN: 04:AB:18:xx:xx:13 (Factory, 0xFFF4 (hex))
  • WAN: 04:AB:18:xx:xx:14 (Factory, 0xFFFA (hex))
  • 2.4G: 04:AB:18:xx:xx:15 (?)
  • 5G: 04:AB:18:xx:xx:16 (Factory, 0x4 (hex))

U-Boot

  • help
    MT7621 # help
    ?       - alias for 'help'
    bootm   - boot application image from memory
    cp      - memory copy
    erase   - erase SPI FLASH memory
    go      - start application at address 'addr'
    help    - print online help
    httpboot- entering the backup mode.
    loadb   - load binary file over serial line (kermit mode)
    md      - memory display
    mdio   - Ralink PHY register R/W command !!
    mm      - memory modify (auto-incrementing)
    nm      - memory modify (constant address)
    printenv- print environment variables
    reset   - Perform RESET of the CPU
    rf      - read/write rf register
    saveenv - save environment variables to persistent storage
    setenv  - set environment variables
    spi     - spi command
    tftpboot- boot image via network using TFTP protocol
    version - print monitor version
    

  • version
    MT7621 # version
    
    U-Boot 1.1.3 (Apr 19 2019 - 17:51:16)
    

  • printenv
    MT7621 # printenv
    bootcmd=tftp
    bootdelay=5
    baudrate=57600
    ethaddr="00:AA:BB:CC:DD:10"
    ipaddr=192.168.2.1
    ethact=Eth0 (10/100-M)
    serverip=192.168.2.2
    model_id=WRC-1167GS2
    board_id=2019A2922624
    wlan0_guest_ssid=e-tomo-582f13
    wlan0_guest_key=78061125
    wlan0_ssid=elecom-582f13
    wlan1_ssid=elecom-582f13
    wlan0_key=************
    wlan1_key=************
    admin_password=********
    wps_pin=********
    hw_version=A1
    wlan0_domain=0x41
    stdin=serial
    stdout=serial
    stderr=serial
    
    Environment size: 440/4092 bytes
    

Kernel

パスワードが設定されているため、ログイン不可。failsafeモードはあるのでそこから情報取得。

  • uname -a
    root@MT7621:/# uname -a
    Linux MT7621 3.10.14 #9 SMP Tue Jul 2 16:34:03 CST 2019 mips GNU/Linux
    

  • cat /proc/version
    root@MT7621:/# cat /proc/version
    Linux version 3.10.14 (*****@ubuntu) (gcc version 4.6.4 (OpenWrt/Linaro GCC 4.6-2013.05 r48067) ) #9 SMP Tue Jul 2 16:34:03 CST 2019
    

  • cat /proc/cpuinfo
    root@MT7621:/# cat /proc/cpuinfo
    system type             : MT7621
    machine                 : Unknown
    processor               : 0
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 577.53
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 1
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 577.53
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 2
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 577.53
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 3
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 577.53
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    

  • cat /proc/meminfo
    root@MT7621:/# cat /proc/meminfo
    MemTotal:         120000 kB
    MemFree:          102604 kB
    Buffers:            1432 kB
    Cached:             2704 kB
    SwapCached:            0 kB
    Active:             1584 kB
    Inactive:           3124 kB
    Active(anon):        576 kB
    Inactive(anon):        4 kB
    Active(file):       1008 kB
    Inactive(file):     3120 kB
    Unevictable:           0 kB
    Mlocked:               0 kB
    SwapTotal:             0 kB
    SwapFree:              0 kB
    Dirty:                 0 kB
    Writeback:             0 kB
    AnonPages:           592 kB
    Mapped:              592 kB
    Shmem:                 4 kB
    Slab:               6280 kB
    SReclaimable:        468 kB
    SUnreclaim:         5812 kB
    KernelStack:         376 kB
    PageTables:           84 kB
    NFS_Unstable:          0 kB
    Bounce:                0 kB
    WritebackTmp:          0 kB
    CommitLimit:       60000 kB
    Committed_AS:       1752 kB
    VmallocTotal:    1048372 kB
    VmallocUsed:        6160 kB
    VmallocChunk:    1042056 kB
    

  • cat /proc/mtd
    root@MT7621:/# cat /proc/mtd
    dev:    size   erasesize  name
    mtd0: 01000000 00010000 "ALL"
    mtd1: 00030000 00010000 "Bootloader"
    mtd2: 00010000 00010000 "Config"
    mtd3: 00010000 00010000 "Factory"
    mtd4: 00b00000 00010000 "firmware"
    mtd5: 00400000 00010000 "kernel"
    mtd6: 00700000 00010000 "rootfs"
    mtd7: 00380000 00010000 "tm_pattern"
    mtd8: 00080000 00010000 "tm_key"
    mtd9: 00030000 00010000 "nvram"
    mtd10: 00080000 00010000 "rootfs_data"
    

  • cat /sbin/mtk_led | head -n 10
    root@MT7621:/# cat /sbin/mtk_led | head -n 10
    #!/bin/sh
    
    PWR_LED_R=16
    PWR_LED_G=7
    PWR_LED_B=8
    WPS_LED=15
    DBDC=$(uci -q get qcawifi.wlan0.dbdc)
    DBDC_2G_LED=3
    DBDC_5G_LED=4
    
    

  • help
    
    

  • help
    
    

  • help
    
    

  • help
    
    

  • bootlog
    ===================================================================
                    MT7621   stage1 code 10:33:55 (ASIC)
                    CPU=500000000 HZ BUS=166666666 HZ
    ==================================================================
    Change MPLL source from XTAL to CR...
    do MEMPLL setting..
    MEMPLL Config : 0x11100000
    3PLL mode + External loopback
    === XTAL-40Mhz === DDR-1200Mhz ===
    PLL4 FB_DL: 0x14, 1/0 = 578/446 51000000
    PLL3 FB_DL: 0x17, 1/0 = 530/494 5D000000
    PLL2 FB_DL: 0x1c, 1/0 = 649/375 71000000
    do DDR setting..[01F40000]
    Apply DDR3 Setting...(use customer AC)
              0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
          --------------------------------------------------------------------------------
    0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000E:|    0    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1
    000F:|    0    0    0    0    0    1    1    1    1    1    1    1    1    1    1    0
    0010:|    1    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0
    0011:|    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0
    0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    rank 0 coarse = 16
    rank 0 fine = 40
    B:|    0    0    0    0    0    0    0    0    0    1    1    1    0    0    0    0
    opt_dle value:10
    DRAMC_R0DELDLY[018]=00002121
    ==================================================================
                    RX      DQS perbit delay software calibration 
    ==================================================================
    1.0-15 bit dq delay value
    ==================================================================
    bit|     0  1  2  3  4  5  6  7  8  9
    --------------------------------------
    0 |    10 9 11 10 9 8 9 7 5 9 
    10 |    7 9 9 11 7 10 
    --------------------------------------
    
    ==================================================================
    2.dqs window
    x=pass dqs delay value (min~max)center 
    y=0-7bit DQ of every group
    input delay:DQS0 =33 DQS1 = 33
    ==================================================================
    bit     DQS0     bit      DQS1
    0  (1~63)32  8  (1~61)31
    1  (2~64)33  9  (2~62)32
    2  (1~66)33  10  (1~62)31
    3  (1~66)33  11  (1~60)30
    4  (1~64)32  12  (2~64)33
    5  (1~66)33  13  (1~62)31
    6  (2~64)33  14  (1~62)31
    7  (1~66)33  15  (1~65)33
    ==================================================================
    3.dq delay value last
    ==================================================================
    bit|    0  1  2  3  4  5  6  7  8   9
    --------------------------------------
    0 |    11 9 11 10 10 8 9 7 7 10 
    10 |    9 12 9 13 9 10 
    ==================================================================
    ==================================================================
         TX  perbyte calibration 
    ==================================================================
    DQS loop = 15, cmp_err_1 = ffff0000 
    dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
    DQ loop=15, cmp_err_1 = ffff0000
    dqs_perbyte_dly.last_dqdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=2 
    byte:0, (DQS,DQ)=(8,8)
    byte:1, (DQS,DQ)=(8,8)
    20,data:88
    [EMI] DRAMC calibration passed
    
    ===================================================================
                    MT7621   stage1 code done 
                    CPU=500000000 HZ BUS=166666666 HZ
    ===================================================================
    
    
    U-Boot 1.1.3 (Apr 19 2019 - 17:51:16)
    
    Board: Ralink APSoC DRAM:  128 MB
    relocate_code Pointer at: 87fb4000
    
    Config XHCI 40M PLL 
    ******************************
    Software System Reset Occurred
    ******************************
    flash manufacture id: c2, device id 20 18
    find flash: MX25L12805D
    ============================================ 
    Ralink UBoot Version: 5.0.0.0
    -------------------------------------------- 
    ASIC MT7621A DualCore (MAC to MT7530 Mode)
    DRAM_CONF_FROM: Auto-Detection 
    DRAM_TYPE: DDR3 
    DRAM bus: 16 bit
    Xtal Mode=3 OCP Ratio=1/3
    Flash component: SPI Flash
    Date:Apr 19 2019  Time:17:51:16
    ============================================ 
    icache: sets:256, ways:4, linesz:32 ,total:32768
    dcache: sets:256, ways:4, linesz:32 ,total:32768 
    
     ##### The CPU freq = 880 MHZ #### 
     estimate memory size =128 Mbytes
    #Reset_MT7530
    set LAN/WAN WLLLL
    
    Please choose the operation: 
       1: Load system code to SDRAM via TFTP. 
       2: Load system code then write to Flash via TFTP. 
       3: Boot system code via Flash (default).
       4: Entr boot command line interface.
       7: Load Boot Loader code then write to Flash via Serial. 
       9: Load Boot Loader code then write to Flash via TFTP.                                                                  0 
       
    3: System Boot system code via Flash.
    ## Booting image at bc050000 ...
       Image Name:   MIPS OpenWrt Linux-3.10
       Image Type:   MIPS Linux Kernel Image (lzma compressed)
       Data Size:    9830336 Bytes =  9.4 MB
       Load Address: 81001000
       Entry Point:  81666310
       Verifying Checksum ... OK
       Uncompressing Kernel Image ... OK
    No initrd
    ## Transferring control to Linux (at address 81666310) ...
    ## Giving linux memsize in MB, 128
    
    Starting kernel ...
    
    
    LINUX started...
    
     THIS IS ASIC
    
    SDK 5.0.S.0
    [    0.000000] Linux version 3.10.14 (eason@ubuntu) (gcc version 4.6.4 (OpenWrt/Linaro GCC 4.6-2013.05 r48067) ) #9 SMP Tue Jul 2 16:34:03 CST 2019
    [    0.000000] 
    [    0.000000]  The CPU feqenuce set to 880 MHz
    [    0.000000] GCMP present
    [    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
    [    0.000000] Software DMA cache coherency
    [    0.000000] Determined physical RAM map:
    [    0.000000]  memory: 08000000 @ 00000000 (usable)
    [    0.000000] Initrd not found or empty - disabling initrd
    [    0.000000] Zone ranges:
    [    0.000000]   DMA      [mem 0x00000000-0x00ffffff]
    [    0.000000]   Normal   [mem 0x01000000-0x07ffffff]
    [    0.000000] Movable zone start for each node
    [    0.000000] Early memory node ranges
    [    0.000000]   node   0: [mem 0x00000000-0x07ffffff]
    [    0.000000] Detected 3 available secondary CPU(s)
    [    0.000000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.000000] PERCPU: Embedded 7 pages/cpu @81ad3000 s6848 r8192 d13632 u32768
    [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32512
    [    0.000000] Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock6 init=/etc/preinit
    [    0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
    [    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
    [    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
    [    0.000000] Writing ErrCtl register=00002808
    [    0.000000] Readback ErrCtl register=00002808
    [    0.000000] Memory: 119764k/131072k available (6594k kernel code, 11308k reserved, 2316k data, 236k init, 0k highmem)
    [    0.000000] Hierarchical RCU implementation.
    [    0.000000] NR_IRQS:128
    [    0.000000] console [ttyS1] enabled
    [    0.120000] Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
    [    0.160000] pid_max: default: 32768 minimum: 301
    [    0.164000] Mount-cache hash table entries: 512
    [    0.168000] launch: starting cpu1
    [    0.172000] launch: cpu1 gone!
    [    0.172000] CPU1 revision is: 0001992f (MIPS 1004Kc)
    [    0.172000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.172000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.172000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.204000] Synchronize counters for CPU 1: done.
    [    0.212000] launch: starting cpu2
    [    0.216000] launch: cpu2 gone!
    [    0.216000] CPU2 revision is: 0001992f (MIPS 1004Kc)
    [    0.216000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.216000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.216000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.248000] Synchronize counters for CPU 2: done.
    [    0.256000] launch: starting cpu3
    [    0.260000] launch: cpu3 gone!
    [    0.260000] CPU3 revision is: 0001992f (MIPS 1004Kc)
    [    0.260000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.260000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.260000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.288000] Synchronize counters for CPU 3: done.
    [    0.296000] Brought up 4 CPUs
    [    0.300000] NET: Registered protocol family 16
    [    0.600000] release PCIe RST: RALINK_RSTCTRL = 7000000
    [    0.604000] PCIE PHY initialize
    [    0.608000] ***** Xtal 40MHz *****
    [    0.612000] start MT7621 PCIe register access
    [    1.204000] RALINK_RSTCTRL = 7000000
    [    1.208000] RALINK_CLKCFG1 = 77ffeff8
    [    1.212000] 
    [    1.212000] *************** MT7621 PCIe RC mode *************
    [    1.708000] PCIE1 no card, disable it(RST&CLK)
    [    1.712000] PCIE2 no card, disable it(RST&CLK)
    [    1.716000] pcie_link status = 0x1
    [    1.720000] RALINK_RSTCTRL= 1000000
    [    1.724000] *** Configure Device number setting of Virtual PCI-PCI bridge ***
    [    1.728000] RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
    [    1.732000] PCIE0 enabled
    [    1.736000] interrupt enable status: 100000
    [    1.740000] Port 0 N_FTS = 1b105000
    [    1.744000] config reg done
    [    1.748000] init_rt2880pci done
    [    1.768000] bio: create slab  at 0
    [    1.772000] vgaarb: loaded
    [    1.776000] SCSI subsystem initialized
    [    1.784000] PCI host bridge to bus 0000:00
    [    1.792000] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
    [    1.804000] pci_bus 0000:00: root bus resource [io  0x1e160000-0x1e16ffff]
    [    1.820000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
    [    1.836000] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
    [    1.852000] pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
    [    1.864000] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
    [    1.880000] pci 0000:00:00.0: BAR 1: assigned [mem 0x60100000-0x6010ffff]
    [    1.892000] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
    [    1.908000] pci 0000:00:00.0: PCI bridge to [bus 01]
    [    1.916000] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
    [    1.928000] PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
    [    1.940000] BAR0 at slot 0 = 0
    [    1.948000] bus=0x0, slot = 0x0
    [    1.952000] res[0]->start = 0
    [    1.960000] res[0]->end = 0
    [    1.964000] res[1]->start = 60100000
    [    1.972000] res[1]->end = 6010ffff
    [    1.980000] res[2]->start = 0
    [    1.984000] res[2]->end = 0
    [    1.988000] res[3]->start = 0
    [    1.996000] res[3]->end = 0
    [    2.000000] res[4]->start = 0
    [    2.008000] res[4]->end = 0
    [    2.012000] res[5]->start = 0
    [    2.020000] res[5]->end = 0
    [    2.024000] bus=0x1, slot = 0x0, irq=0x4
    [    2.032000] res[0]->start = 60000000
    [    2.040000] res[0]->end = 600fffff
    [    2.044000] res[1]->start = 0
    [    2.052000] res[1]->end = 0
    [    2.056000] res[2]->start = 0
    [    2.064000] res[2]->end = 0
    [    2.068000] res[3]->start = 0
    [    2.076000] res[3]->end = 0
    [    2.080000] res[4]->start = 0
    [    2.084000] res[4]->end = 0
    [    2.092000] res[5]->start = 0
    [    2.096000] res[5]->end = 0
    [    2.104000] Switching to clocksource MIPS
    [    2.112000] NET: Registered protocol family 2
    [    2.120000] TCP established hash table entries: 1024 (order: 1, 8192 bytes)
    [    2.136000] TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
    [    2.148000] TCP: Hash tables configured (established 1024 bind 1024)
    [    2.160000] TCP: reno registered
    [    2.168000] UDP hash table entries: 256 (order: 1, 8192 bytes)
    [    2.176000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
    [    2.192000] NET: Registered protocol family 1
    [    2.200000] RPC: Registered named UNIX socket transport module.
    [    2.212000] RPC: Registered udp transport module.
    [    2.220000] RPC: Registered tcp transport module.
    [    2.228000] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    2.244000] squashfs: version 4.0 (2009/01/31) Phillip Lougher
    [    2.256000] jffs2: version 2.2. (NAND) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
    [    2.276000] fuse init (API version 7.22)
    [    2.284000] msgmni has been set to 233
    [    2.292000] io scheduler noop registered (default)
    [    2.304000] reg_int_mask=0, INT_MASK= 0 
    [    2.312000] HSDMA_init
    [    2.316000] 
    [    2.316000]  hsdma_phy_tx_ring0 = 0x00c00000, hsdma_tx_ring0 = 0xa0c00000
    [    2.332000] 
    [    2.332000]  hsdma_phy_rx_ring0 = 0x00c04000, hsdma_rx_ring0 = 0xa0c04000
    [    2.348000] TX_CTX_IDX0 = 0
    [    2.356000] TX_DTX_IDX0 = 0
    [    2.360000] RX_CRX_IDX0 = 3ff
    [    2.364000] RX_DRX_IDX0 = 0
    [    2.372000] set_fe_HSDMA_glo_cfg
    [    2.376000] HSDMA_GLO_CFG = 465
    [    2.384000] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
    [    2.396000] serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
    [    2.412000] serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
    [    2.424000] Ralink gpio driver initialized
    [    2.436000] brd: module loaded
    [    2.444000] flash manufacture id: c2, device id 20 18
    [    2.452000] MX25L12805D(c2 2018c220) (16384 Kbytes)
    [    2.464000] mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
    [    2.484000] Creating 11 MTD partitions on "raspi":
    [    2.492000] 0x000000000000-0x000001000000 : "ALL"
    [    2.504000] 0x000000000000-0x000000030000 : "Bootloader"
    [    2.512000] 0x000000030000-0x000000040000 : "Config"
    [    2.524000] 0x000000040000-0x000000050000 : "Factory"
    [    2.536000] 0x000000050000-0x000000b50000 : "firmware"
    [    2.544000] 0x000000050000-0x000000450000 : "kernel"
    [    2.556000] 0x000000450000-0x000000b50000 : "rootfs"
    [    2.568000] 0x000000b50000-0x000000ed0000 : "tm_pattern"
    [    2.576000] 0x000000ed0000-0x000000f50000 : "tm_key"
    [    2.588000] 0x000000f50000-0x000000f80000 : "nvram"
    [    2.596000] 0x000000f80000-0x000001000000 : "rootfs_data"
    [    2.608000] PPP generic driver version 2.4.2
    [    2.616000] PPP BSD Compression module registered
    [    2.628000] PPP MPPE Compression module registered
    [    2.636000] NET: Registered protocol family 24
    [    2.644000] PPTP driver version 0.8.5
    [    2.652000] #############################################
    [    2.664000] ez_init_mod
    [    2.668000] #############################################
    [    2.680000] register mt_drv
    [    2.696000] 
    [    2.696000] 
    [    2.696000] === pAd = c0201000, size = 3961680 ===
    [    2.696000] 
    [    2.716000] PciHif.CSRBaseAddress =0xc0100000, csr_addr=0xc0100000!
    [    2.736000] RTMPInitPCIeDevice():device_id=0x7615
    [    2.748000] DriverOwn()::Try to Clear FW Own...
    [    3.052000] DriverOwn()::Success to clear FW Own
    [    3.060000] mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
    [    3.076000] mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
    [    3.084000] RtmpChipOpsHook(492): Not support for HIF_MT yet! MACVersion=0x0
    [    3.100000] mt7615_init()-->
    [    3.104000] Use 1st iPAiLNA default bin.
    [    3.112000] Use 0st /etc_ro/wlan/MT7615E_EEPROM1.bin default bin.
    [    3.124000] skb_free start address is 0x8706a6cc.
    [   17.996000] free_txd: 00c60010, ei_local->cpu_ptr: 00C60000
    [   18.008000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   18.020000] ----------------+---------+--------
    [   18.028000]      0xa0c60000 0x00C60000 0x00C60000
    [   18.036000] 
    [   18.036000] phy_qrx_ring = 0x00c1a000, qrx_ring = 0xa0c1a000
    [   18.052000] 
    [   18.052000] phy_rx_ring0 = 0x00c1c000, rx_ring[0] = 0xa0c1c000
    [   18.088000] MT7530 Reset Completed!!
    [   18.100000] change HW-TRAP to 0x117c8f
    [   18.112000] set LAN/WAN WLLLL
    [   18.120000] GMAC1_MAC_ADRH -- : 0x000004ab
    [   18.128000] GMAC1_MAC_ADRL -- : 0x18582f13
    [   18.136000] GDMA2_MAC_ADRH -- : 0x000004ab
    [   18.144000] GDMA2_MAC_ADRL -- : 0x18582f14
    [   18.156000] eth3: ===> VirtualIF_open
    [   18.164000] MT7621 GE2 link rate to 1G
    [   18.164000] CDMA_CSG_CFG = 81000000
    [   18.164000] GDMA1_FWD_CFG = 20710000
    [   18.164000] GDMA2_FWD_CFG = 20710000
    [   18.672000] ra2880stop()...Done
    [   18.676000] eth3: ===> VirtualIF_close
    [   18.688000] Free TX/RX Ring Memory!
    [   18.700000]  4:FFFFFFAB:18:58:2F:13
    [   18.708000] Raeth v3.1 (Tasklet)
    [   18.716000] set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1
    [   18.732000] phy_free_head is 0xc18000!!!
    [   18.740000] phy_free_tail_phy is 0xc19ff0!!!
    [   18.748000] txd_pool=a0c60000 phy_txd_pool=00C60000
    [   18.760000] ei_local->skb_free start address is 0x8706a6cc.
    [   18.772000] free_txd: 00c60010, ei_local->cpu_ptr: 00C60000
    [   18.780000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   18.792000] ----------------+---------+--------
    [   18.800000]      0xa0c60000 0x00C60000 0x00C60000
    [   18.808000] 
    [   18.808000] phy_qrx_ring = 0x00c1a000, qrx_ring = 0xa0c1a000
    [   18.824000] 
    [   18.824000] phy_rx_ring0 = 0x00c1c000, rx_ring[0] = 0xa0c1c000
    [   18.860000] MT7530 Reset Completed!!
    [   18.872000] change HW-TRAP to 0x117c8f
    [   18.884000] set LAN/WAN WLLLL
    [   18.892000] GMAC1_MAC_ADRH -- : 0x000004ab
    [   18.900000] GMAC1_MAC_ADRL -- : 0x18582f13
    [   18.908000] eth3: ===> VirtualIF_open
    [   18.916000] MT7621 GE2 link rate to 1G
    [   18.916000] CDMA_CSG_CFG = 81000000
    [   18.916000] GDMA1_FWD_CFG = 20710000
    [   18.916000] GDMA2_FWD_CFG = 20710000
    [   18.944000] device eth2 entered promiscuous mode
    [   18.960000] br-lan: port 1(eth2) entered forwarding state
    [   18.968000] br-lan: port 1(eth2) entered forwarding state
    [   18.992000] eth3: ===> VirtualIF_open
    [   19.000000] device eth3 entered promiscuous mode
    [   19.012000] br-lan: port 2(eth3) entered forwarding state
    [   19.024000] br-lan: port 2(eth3) entered forwarding state
    dnsmasq
    dnsmasq [br-lan]
    [   20.972000] br-lan: port 1(eth2) entered forwarding state
    [   21.028000] br-lan: port 2(eth3) entered forwarding state
    LAN_UP_AGAIN
    UHTTP crt Checked
    main init
    main init
    page=[/setup/index.html]
    page=[/setup/index.html]
    count=[43]
    count=[43]
    [   29.044000] DriverOwn()::Return since already in Driver Own...
    [   29.056000] APWdsInitialize():WdsEntry[0]
    [   29.064000] APWdsInitialize():WdsEntry[1]
    [   29.072000] APWdsInitialize():WdsEntry[2]
    [   29.080000] APWdsInitialize():WdsEntry[3]
    [   29.092000] [wifi_fwd_set_cb_num] band_cb_offset=33, recv_from_cb_offset=34
    [   29.108000] 
    [   29.108000] [Force Roam] => Force Roam Support = 0
    [   29.224000] multi-profile merge success, en:1,pf1_num:1,pf2_num:1,total:2
    [   29.248000] MacAddress1 = 00:00:00:00:00:00
    [   29.260000] E2pAccessMode=2
    [   29.264000] SSID[0]=elecom-582f13, EdcaIdx=0
    [   29.272000] SSID[1]=elecom-582f13, EdcaIdx=0
    [   29.284000] RTMPSetProfileParameters(): DBDC Mode=1
    [   29.292000] TriBandChGrp=0/0/0/0
    [   29.300000] cfg_mode=14
    [   29.304000] cfg_mode=14
    [   29.308000] wmode_band_equal(): Band Equal!
    [   29.316000] cfg_mode=9
    [   29.324000] cfg_mode=9
    [   29.328000] BandSteering=0
    [   29.336000] BndStrgBssIdx=1;1
    [   29.340000] [TxPower] BAND0: 100, BAND1: 100 
    [   29.348000] [SKUenable] BAND0: 1, BAND1: 1 
    [   29.360000] [PERCENTAGEenable] BAND0: 1, BAND1: 1 
    [   29.368000] [BFBACKOFFenable] BAND0: 1, BAND1: 1 
    [   29.376000] CalCacheApply = 0 
    [   29.388000] APEdca0
    [   29.392000] Valid=1
    [   29.396000] APAifsn[0]=3
    [   29.400000] APAifsn[1]=7
    [   29.404000] APAifsn[2]=1
    [   29.412000] APAifsn[3]=1
    [   29.416000] APEdca1
    [   29.420000] Valid=1
    [   29.424000] APAifsn[0]=3
    [   29.428000] APAifsn[1]=7
    [   29.432000] APAifsn[2]=1
    [   29.440000] APAifsn[3]=1
    [   29.444000] APEdca2
    [   29.448000] APEdca3
    [   29.456000] BSSAifsn[0]=3
    [   29.460000] BSSAifsn[1]=7
    [   29.468000] BSSAifsn[2]=2
    [   29.472000] BSSAifsn[3]=2
    [   29.476000] BSSAifsn[0]=3
    [   29.484000] BSSAifsn[1]=7
    [   29.488000] BSSAifsn[2]=2
    [   29.492000] BSSAifsn[3]=2
    [   29.500000] APSDCapable[0]=0
    [   29.504000] APSDCapable[1]=0
    [   29.508000] default ApCliAPSDCapable[0]=0
    [   29.516000] default ApCliAPSDCapable[1]=0
    [   29.528000] DfsZeroWait Support=0/0 
    [   29.536000] DfsZeroWaitCacTime=0/0 
    [   29.576000] rtmp_read_wds_from_file(): WDS Profile
    [   29.588000] APWdsInitialize():WdsEntry[0]
    [   29.596000] APWdsInitialize():WdsEntry[1]
    [   29.604000] APWdsInitialize():WdsEntry[2]
    [   29.612000] APWdsInitialize():WdsEntry[3]
    [   29.620000] WDS-Enable mode=0
    [   29.624000] AndesSendCmdMsg: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD
    [   29.648000] HT: WDEV[0] Ext Channel = ABOVE
    [   29.656000] HT: WDEV[1] Ext Channel = ABOVE
    [   29.668000] HT: greenap_cap = 0
    [   29.716000] IcapMode = 0
    [   29.728000] WtcSetMaxStaNum: MaxStaNum:102, BssidNum:2, WdsNum:4, ApcliNum:2, MaxNumChipRept:16, MinMcastWcid:124
    [   29.748000] Top Init Done!
    [   29.752000] Use alloc_skb
    [   29.760000] RX[0] DESC a0c14000 size = 16384
    [   29.768000] RX[1] DESC a0c12000 size = 8192
    [   29.780000] Hif Init Done!
    [   29.784000] ctl->txq = c05c32c0
    [   29.792000] ctl->rxq = c05c32cc
    [   29.796000] ctl->ackq = c05c32d8
    [   29.804000] ctl->kickq = c05c32e4
    [   29.812000] ctl->tx_doneq = c05c32f0
    [   29.816000] ctl->rx_doneq = c05c32fc
    [   29.824000] mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
    [   29.836000] mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
    [   29.852000] AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
    [   29.868000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   29.876000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   29.892000] 20170809192718a
    [   29.896000] 
    [   29.900000] platform = 
    [   29.904000] ALPS
    [   29.908000] hw/sw version = 
    [   29.912000] 8a108a10
    [   29.916000] patch version = 
    [   29.924000] 00000010
    [   29.928000] Patch SEM Status=2
    [   29.936000] MtCmdPatchSemGet:(ret = 0)
    [   29.940000] 
    [   29.940000] Patch is not ready && get semaphore success, SemStatus(2)
    [   29.956000] EventGenericEventHandler: CMD Success
    [   29.968000] MtCmdAddressLenReq:(ret = 0)
    [   29.976000] MtCmdPatchFinishReq
    [   29.992000] EventGenericEventHandler: CMD Success
    [   30.000000] Send checksum req..
    [   30.008000] Patch SEM Status=3
    [   30.016000] MtCmdPatchSemGet:(ret = 0)
    [   30.020000] 
    [   30.020000] Release patch semaphore, SemStatus(3)
    [   30.032000] AndesMTEraseRomPatch
    [   30.040000] WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
    [   30.052000] AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
    [   30.064000] Build Date:_201708190346
    [   30.072000] Build Date:_201708190346
    [   30.080000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   30.088000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   30.104000] EventGenericEventHandler: CMD Success
    [   30.112000] MtCmdAddressLenReq:(ret = 0)
    [   30.124000] EventGenericEventHandler: CMD Success
    [   30.136000] MtCmdAddressLenReq:(ret = 0)
    [   30.144000] MtCmdFwStartReq: override = 1, address = 540672
    [   30.152000] EventGenericEventHandler: CMD Success
    [   30.164000] Build Date:_201707211524
    [   30.172000] EventGenericEventHandler: CMD Success
    [   30.180000] MtCmdAddressLenReq:(ret = 0)
    [   30.188000] MtCmdFwStartReq: override = 4, address = 0
    [   30.252000] EventGenericEventHandler: CMD Success
    [   30.304000] WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
    [   30.316000] MCU Init Done!
    [   30.320000]  MtCmdSetRlmPorCal: (ret = 0) 
    [   30.328000] efuse_probe: efuse = 10000212
    [   30.336000] RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
    [   30.348000] RtmpEepromGetDefault::e2p_dafault=1
    [   30.356000] RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
    [   30.372000] NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x0]
    [   30.396000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   30.416000] MtCmdSetTxLpfCal:(ret = 0)
    [   30.424000] MtCmdSetTxIqCal:(ret = 0)
    [   30.432000] MtCmdSetTxDcCal:(ret = 0)
    [   30.440000] MtCmdSetRxFiCal:(ret = 0)
    [   30.444000] MtCmdSetRxFdCal:(ret = 0)
    [   30.452000] MtCmdSetRxFdCal:(ret = 0)
    [   30.460000] MtCmdSetRxFdCal:(ret = 0)
    [   30.468000] MtCmdSetRxFdCal:(ret = 0)
    [   30.476000] MtCmdSetRxFdCal:(ret = 0)
    [   30.480000] MtCmdSetRxFdCal:(ret = 0)
    [   30.488000] MtCmdSetRxFdCal:(ret = 0)
    [   30.496000] MtCmdSetRxFdCal:(ret = 0)
    [   30.504000] MtCmdSetRxFdCal:(ret = 0)
    [   30.512000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   31.064000] Country Region from e2p = 101
    [   31.072000] mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
    [   31.084000] mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
    [   31.096000] mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
    [   31.112000] rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
    [   31.124000] RTMPReadTxPwrPerRate(1381): Don't Support this now!
    [   31.136000] RcRadioInit(): DbdcMode=1, ConcurrentBand=2
    [   31.148000] RcRadioInit(): pRadioCtrl=8773d454,Band=0,rfcap=1,channel=1,PhyMode=2 extCha=0xf
    [   31.164000] RcRadioInit(): pRadioCtrl=8773d540,Band=1,rfcap=2,channel=36,PhyMode=1 extCha=0xf
    [   31.180000] MtCmdSetDbdcCtrl:(ret = 0)
    [   31.188000] Band Rf: 1, Phy Mode: 2
    [   31.196000] Band Rf: 2, Phy Mode: 1
    [   31.204000] AntCfgInit(2766): Not support for HIF_MT yet!
    [   31.212000] MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
    [   31.264000] MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
    [   31.276000] EEPROM Init Done!
    [   31.284000] mt_mac_init()-->
    [   31.288000] mt_mac_pse_init(2750): Don't Support this now!
    [   31.300000] mt7615_init_mac_cr()-->
    [   31.304000] mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
    [   31.316000] mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
    [   31.328000] MtAsicSetMacMaxLen(1300): Not finish Yet!
    [   31.336000] 
    [   31.500000] ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 3
    [   31.516000] MtCmdSetMacTxRx:(ret = 0)
    [   31.524000] MtCmdSetMacTxRx:(ret = 0)
    [   31.532000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   31.548000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   31.560000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   31.580000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   31.588000] MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   31.604000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   31.832000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   31.848000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   31.856000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   31.876000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   31.884000] MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   31.904000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   32.280000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   32.296000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   32.304000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   32.324000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   32.332000] MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   32.352000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   32.572000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   32.588000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   32.596000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   32.616000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   32.624000] MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   32.644000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   32.864000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   32.880000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   32.888000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   32.908000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   32.916000] MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   32.936000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   33.340000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   33.356000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   33.364000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   33.384000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   33.392000] MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   33.412000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   33.632000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   33.648000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   33.656000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   33.676000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   33.684000] MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   33.704000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   34.032000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   34.048000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.056000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   34.076000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   34.084000] MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   34.104000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   34.324000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   34.340000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.348000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   34.368000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   34.380000] MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   34.396000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   34.616000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   34.632000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   34.640000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   34.660000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   34.672000] MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   34.688000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   35.000000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   35.016000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.024000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   35.044000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.056000] MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   35.072000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   35.444000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   35.460000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.468000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   35.488000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.500000] MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   35.516000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   35.736000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   35.752000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   35.760000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   35.780000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   35.792000] MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   35.808000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   36.064000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   36.080000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   36.088000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   36.108000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   36.120000] MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   36.136000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   36.356000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   36.372000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   36.380000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   36.400000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   36.412000] MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   36.428000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   36.648000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   36.664000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   36.672000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   36.692000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   36.704000] MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   36.720000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   37.064000] ====================================================================
    [   37.076000] Channel  36 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.092000] Channel  40 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.108000] Channel  44 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.120000] Channel  48 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.136000] Channel  52 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.152000] Channel  56 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.164000] Channel  60 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.180000] Channel  64 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.196000] Channel 100 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.208000] Channel 104 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.224000] Channel 108 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.240000] Channel 112 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.252000] Channel 116 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.268000] Channel 120 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.284000] Channel 124 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.296000] Channel 128 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   37.312000] ====================================================================
    [   37.328000] Rule 3 Channel Busy time value : Select Primary Channel 36 
    [   37.340000] Rule 3 Channel Busy time value : Min Channel Busy = 0
    [   37.352000] Rule 3 Channel Busy time value : BW = 80
    [   37.364000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 49,Channel = 36  
    [   37.384000]  AutoChSelUpdateChannel(): Update channel for wdev1 for this band PhyMode = 14,Channel = 0  
    [   37.404000] mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200] 
    [   37.420000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   37.432000] mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   37.452000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   37.460000] MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0 
    [   37.476000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   37.696000] mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200] 
    [   37.712000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   37.720000] mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   37.740000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   37.748000] MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0 
    [   37.768000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   38.100000] mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200] 
    [   38.116000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   38.124000] mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   38.144000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   38.152000] MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0 
    [   38.172000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   38.392000] mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300] 
    [   38.408000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   38.416000] mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   38.436000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   38.444000] MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0 
    [   38.464000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   38.684000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   38.700000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   38.708000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   38.728000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   38.736000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   38.756000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   39.128000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   39.144000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   39.152000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   39.172000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   39.180000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   39.200000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   39.420000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   39.436000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   39.444000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   39.464000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   39.472000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   39.492000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   39.712000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   39.728000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   39.736000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   39.756000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   39.764000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   39.784000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   40.188000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   40.204000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   40.212000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   40.232000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   40.240000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   40.260000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   40.480000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   40.496000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   40.504000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   40.524000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   40.536000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   40.552000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   40.772000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   40.788000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   40.796000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   40.816000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   40.824000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   40.844000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   41.148000] ====================================================================
    [   41.160000] Channel   1 : Busy Time =   8155, Skip Channel = FALSE, BwCap = TRUE
    [   41.176000] Channel   2 : Busy Time =  22485, Skip Channel = FALSE, BwCap = TRUE
    [   41.192000] Channel   3 : Busy Time =   3198, Skip Channel = FALSE, BwCap = TRUE
    [   41.204000] Channel   4 : Busy Time =   3881, Skip Channel = FALSE, BwCap = TRUE
    [   41.220000] Channel   5 : Busy Time =   2389, Skip Channel = FALSE, BwCap = TRUE
    [   41.236000] Channel   6 : Busy Time =   7421, Skip Channel = FALSE, BwCap = TRUE
    [   41.248000] Channel   7 : Busy Time =   7464, Skip Channel = FALSE, BwCap = TRUE
    [   41.264000] Channel   8 : Busy Time =   9509, Skip Channel = FALSE, BwCap = TRUE
    [   41.280000] Channel   9 : Busy Time =   3834, Skip Channel = FALSE, BwCap = TRUE
    [   41.292000] Channel  10 : Busy Time =   3876, Skip Channel = FALSE, BwCap = TRUE
    [   41.308000] Channel  11 : Busy Time =   8277, Skip Channel = FALSE, BwCap = TRUE
    [   41.324000] ====================================================================
    [   41.336000] Rule 3 Channel Busy time value : Select Primary Channel 5 
    [   41.352000] Rule 3 Channel Busy time value : Min Channel Busy = 2389
    [   41.364000] Rule 3 Channel Busy time value : BW = 20
    [   41.372000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 49,Channel = 36  
    [   41.392000]  AutoChSelUpdateChannel(): Update channel for wdev1 for this band PhyMode = 14,Channel = 5  
    [   41.412000] ApAutoChannelAtBootUp Force Roam Support = 0
    [   41.520000] ez_allocate_or_update_non_ez_band_hook:: add new band entry at index: 0
    [   41.536000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=36
    [   41.556000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=2/49, support 32 channels
    [   41.572000] Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
    [   41.580000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   41.580000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   41.612000] bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
    [   41.640000] MtCmdSetDbdcCtrl:(ret = 0)
    [   41.748000]  [RadarStateCheck]Set into RD_NORMAL_MODE  
    [   41.760000] MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 1, BandIdx: 1
    [   41.772000] MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 1
    [   41.784000] MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 1
    [   41.796000] mt7615_bbp_adjust():rf_bw=2, ext_ch=1, PrimCh=36, HT-CentCh=38, VHT-CentCh=42
    [   41.812000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   41.832000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   41.840000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   41.860000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   41.868000] MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   41.888000] BW = 2,TXStream = 2, RXStream = 2, scan(0)
    [   41.912000] ap_phy_rrm_init_byRf(): AP Set CentralFreq at 42(Prim=36, HT-CentCh=38, VHT-CentCh=42, BBP_BW=2)
    [   41.948000] [WrapDfsRadarDetectStart]: Band0Ch is 36
    [   41.956000] [WrapDfsRadarDetectStart]: Band1Ch is 0
    [   41.968000] LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
    [   41.980000] MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
    [   41.992000] MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
    [   42.004000] MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
    [   42.016000] WifiFwdSet::disabled=0
    [   42.024000] ap_ftkd> Initialize FT KDP Module...
    [   42.032000] Main bssid = 04:ab:18:58:2f:16
    [   42.044000] AsicRadioOnOffCtrl(): DbdcIdx=1 RadioOn
    [   42.052000] MtCmdSetMacTxRx:(ret = 0)
    [   42.060000] MtCmdSetMacTxRx:(ret = 0)
    [   42.068000] MCS Set = ff ff 00 00 01
    [   42.076000]  Regroup Support = 0
    [   42.140000] WDS_Init():
    [   42.144000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   42.156000]   MacTabMatchWCID = 0
    [   42.164000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   42.176000]   MacTabMatchWCID = 0
    [   42.184000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   42.192000]   MacTabMatchWCID = 0
    [   42.204000] The new WDS interface MAC = FF:FF:FF:FF:FF:FF
    [   42.212000]   MacTabMatchWCID = 0
    [   42.220000] Total allocated 4 WDS interfaces!
    [   42.232000] ###########################ez_init_hook########################
    [   42.244000] 
    [   42.244000] [REGROUP] => Regroup Support = 0
    [   42.256000] ###########################ez_init_hook########################
    [   42.272000] 
    [   42.272000] [REGROUP] => Regroup Support = 0
    [   42.284000] WtcSetMaxStaNum: MaxStaNum:102, BssidNum:2, WdsNum:4, ApcliNum:2, MaxNumChipRept:16, MinMcastWcid:124
    [   42.352000] red_is_enabled: set CR4/N9 RED Enable to 1.
    [   42.364000] cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
    [   42.376000] Correct apidx from 0 to 0 for WscUUIDInit
    [   42.384000] Generate UUID for apidx(0)
    [   42.460000] device ra0 entered promiscuous mode
    [   42.468000] br-lan: port 3(ra0) entered forwarding state
    [   42.480000] br-lan: port 3(ra0) entered forwarding state
    [   42.652000] WifiSysOpen(), wdev idx = 1
    [   42.660000] wdev_attr_update(): wdevId1 = 04:ab:18:58:2f:15
    [   42.672000] MtCmdSetDbdcCtrl:(ret = 0)
    [   42.680000] [PMF]APPMFInit:: apidx=1, MFPC=0, MFPR=0, SHA256=0
    [   42.692000] [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
    [   42.704000] 
    [   42.704000] [Force Roam] => Force Roam Support = 0
    [   42.716000] ez_allocate_or_update_non_ez_band_hook:: add new band entry at index: 1
    [   42.732000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=5
    [   42.748000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=14/49, support 32 channels
    [   42.764000] Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
    [   42.776000] MtCmdSetMacTxRx:(ret = 0)
    [   42.784000] MtCmdSetMacTxRx:(ret = 0)
    [   42.792000] mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200] 
    [   42.808000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   42.820000] mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   42.836000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   42.848000] MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0 
    [   42.864000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   42.884000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   43.020000] :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
    [   43.404000] mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200] 
    [   43.420000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.428000] mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   43.448000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.456000] MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0 
    [   43.476000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   43.496000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   43.804000] mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300] 
    [   43.820000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.828000] mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   43.848000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.856000] MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0 
    [   43.876000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   43.896000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   44.252000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   44.268000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.276000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   44.296000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.304000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   44.324000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   44.344000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   44.484000] br-lan: port 3(ra0) entered forwarding state
    [   44.692000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   44.708000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.716000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   44.736000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.744000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   44.764000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   44.784000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   45.192000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   45.208000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.216000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   45.236000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.244000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   45.264000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   45.284000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   45.608000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   45.624000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.632000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   45.652000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.660000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   45.680000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   45.700000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.100000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   46.116000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.124000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   46.144000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.152000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   46.172000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   46.192000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.520000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   46.536000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.544000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   46.564000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.572000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   46.592000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   46.612000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   47.000000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   47.016000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   47.024000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   47.044000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   47.052000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   47.072000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   47.092000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   47.512000] mt7615_apply_dcoc() : reload Central CH [12] BW [0] from cetral freq [2467]  offset [2500] 
    [   47.528000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   47.536000] mt7615_apply_dpd() : reload Central CH [12] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   47.556000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   47.568000] MtCmdChannelSwitch: control_chl = 12,control_ch2=0, central_chl = 12 DBDCIdx= 0, Band= 0 
    [   47.584000] BW = 0,TXStream = 2, RXStream = 2, scan(1)
    [   47.604000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   47.992000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:126 for WDEV_TYPE:1
    [   47.992000]  LinkToOmacIdx = 11, LinkToWdevType = 1
    [   48.020000] bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 0,                 CmdBssInfoBmcRate.u2McTransmit = 0
    [   48.048000] MtCmdSetDbdcCtrl:(ret = 0)
    [   48.156000]  [RadarStateCheck]Set into RD_NORMAL_MODE  
    [   48.168000] MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 1, BandIdx: 0
    [   48.180000] MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0
    [   48.192000] MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 0
    [   48.204000] mt7615_bbp_adjust():rf_bw=0, ext_ch=0, PrimCh=5, HT-CentCh=5, VHT-CentCh=42
    [   48.220000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   48.240000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   48.248000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   48.268000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   48.276000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   48.296000] BW = 0,TXStream = 2, RXStream = 2, scan(0)
    [   48.324000] ap_phy_rrm_init_byRf(): AP Set CentralFreq at 5(Prim=5, HT-CentCh=5, VHT-CentCh=42, BBP_BW=0)
    [   48.356000] LeadTimeForBcn, OmacIdx = 11, WDEV_WITH_BCN_ABILITY
    [   48.368000] Generate UUID for apidx(1)
    [   48.428000] device rax0 entered promiscuous mode
    [   48.436000] br-lan: port 4(rax0) entered forwarding state
    [   48.448000] br-lan: port 4(rax0) entered forwarding state
    [   50.452000] br-lan: port 4(rax0) entered forwarding state
    [   50.780000] WifiSysOpen(), wdev idx = 7
    [   50.788000] MtCmdSetDbdcCtrl:(ret = 0)
    [   50.796000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=5
    [   50.816000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=5
    [   50.832000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=14/49, support 32 channels
    [   50.852000] WifiSysOpen(), wdev idx = 6
    [   50.860000] MtCmdSetDbdcCtrl:(ret = 0)
    [   50.868000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=36
    [   50.884000] HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=36
    [   50.904000] CountryCode(2.4G/5G)=1/1, RFIC=25, PHY mode(2.4G/5G)=14/49, support 32 channels
    [   51.596000] BndStrg_Init()
    BndStrg_SetInfFlags(): BSS(04:AB:18:58:2F:16) set 5G Inf ra0 ready.
    BndStrg_SetInfFlags(): BSS(04:AB:18:58:2F:15) set 2G Inf rax0 ready.
    BndStrg Enable Success
    
    [   51.644000] BndStrg is already Enable
    [   51.644000] 
    [   53.748000] BndStrg_InfStatusRsp:INF [rax0]STATUS QUERY ON
    [   53.760000] 
    [   53.760000] BndStrg_InfStatusRsp:INF [ra0]STATUS QUERY ON
    [   55.796000] Send DISASSOC frame(3) with ra0
    [   55.804000] Send DISASSOC frame(3) with ra1
    [   55.812000] Send DISASSOC frame(3) with ra0
    [   55.820000] Send DISASSOC frame(3) with ra1
    

WHR-300HP2でI2Cを使ったメモ

最近急に思い立ち、I2Cを用いてLED等を制御してみたくなった。
その際、I2Cをどうやって使うか、という点で、WHR-300HP2を利用してみたメモ。

WHR-300HP2

基板のフロント寄りAOSSボタン付近にJTAG用らしきピンが並んでいる(2行7列)ため、ここに2.54mmピッチのピンヘッダを足を外側に曲げたうえでハンダ付け。
IMG_20171224_140819.jpg

IMG_20171226_163853.jpg

基板表面をフロントLEDが右、RJ-45ポートを左、UARTを上として見た場合
(I2Cに必要なピン数のみ調べた)

GND GND 3.3V
GPIO
#41
GPIO
#40

3.3VはUARTの3.3Vと同回路。

#40, #41 の各ピンは JTAG or EPHY LED or GPIO でMUXできるピンであり、OpenWrtではデフォルトでEPHY LEDとして構成されているため、WHR-300HP2のDTSを書き換えてGPIOに向ける。

diff --git a/target/linux/ramips/dts/mt7620a_buffalo_whr-300hp2.dts b/target/linux/ramips/dts/mt7620a_buffalo_whr-300hp2.dts
index 8bdf87501e..ef1f5af6a4 100644
--- a/target/linux/ramips/dts/mt7620a_buffalo_whr-300hp2.dts
+++ b/target/linux/ramips/dts/mt7620a_buffalo_whr-300hp2.dts
@@ -133,15 +133,15 @@
 &pinctrl {
        state_default: pinctrl0 {
                gpio {
-                       ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
+                       ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy";
                        ralink,function = "gpio";
                };
        };
 };

 ðernet {
-       pinctrl-names = "default";
-       pinctrl-0 = <&ephy_pins>;
+/*     pinctrl-names = "default";
+       pinctrl-0 = <&ephy_pins>;*/
        mtd-mac-address = <&factory 0x4>;
        mediatek,portmap = "llllw";
 };

書き換えたDTSを用いてビルドし実機へインストール。
ビルド時に使用したconfigは以下の通り。I2C関連のドライバとツールを含める。無線は要らないから大体落とした。

CONFIG_TARGET_ramips=y
CONFIG_TARGET_ramips_mt7620=y
CONFIG_TARGET_ramips_mt7620_DEVICE_buffalo_whr-300hp2=y
# CONFIG_DRIVER_11N_SUPPORT is not set
# CONFIG_DRIVER_11W_SUPPORT is not set
CONFIG_KERNEL_BUILD_DOMAIN="Taiha.Net"
CONFIG_KERNEL_BUILD_USER="musashino205"
CONFIG_LIBCURL_COOKIES=y
CONFIG_LIBCURL_FILE=y
CONFIG_LIBCURL_FTP=y
CONFIG_LIBCURL_HTTP=y
CONFIG_LIBCURL_MBEDTLS=y
CONFIG_LIBCURL_NO_SMB="!"
CONFIG_LIBCURL_PROXY=y
CONFIG_LUCI_LANG_ja=y
CONFIG_OPENSSL_ENGINE=y
CONFIG_OPENSSL_PREFER_CHACHA_OVER_GCM=y
CONFIG_OPENSSL_WITH_ASM=y
CONFIG_OPENSSL_WITH_CHACHA_POLY1305=y
CONFIG_OPENSSL_WITH_CMS=y
CONFIG_OPENSSL_WITH_DEPRECATED=y
CONFIG_OPENSSL_WITH_ERROR_MESSAGES=y
CONFIG_OPENSSL_WITH_PSK=y
CONFIG_OPENSSL_WITH_SRP=y
CONFIG_OPENSSL_WITH_TLS13=y
CONFIG_PACKAGE_ca-bundle=y
CONFIG_PACKAGE_ca-certificates=y
CONFIG_PACKAGE_cgi-io=y
CONFIG_PACKAGE_curl=y
# CONFIG_PACKAGE_hostapd-common is not set
CONFIG_PACKAGE_i2c-tools=y
# CONFIG_PACKAGE_iw is not set
# CONFIG_PACKAGE_iwinfo is not set
# CONFIG_PACKAGE_iw is not set                                                                                                                                                                                                                                        [0/21126]
# CONFIG_PACKAGE_iwinfo is not set
# CONFIG_PACKAGE_kmod-cfg80211 is not set
CONFIG_PACKAGE_kmod-i2c-algo-bit=y
CONFIG_PACKAGE_kmod-i2c-core=y
CONFIG_PACKAGE_kmod-i2c-gpio=y
CONFIG_PACKAGE_kmod-i2c-gpio-custom=y
CONFIG_PACKAGE_kmod-ledtrig-heartbeat=y
CONFIG_PACKAGE_kmod-ledtrig-timer=y
# CONFIG_PACKAGE_kmod-mac80211 is not set
# CONFIG_PACKAGE_kmod-rt2800-soc is not set
# CONFIG_PACKAGE_kmod-rt2x00-lib is not set
CONFIG_PACKAGE_libcurl=y
CONFIG_PACKAGE_libi2c=y
CONFIG_PACKAGE_libiwinfo-lua=y
CONFIG_PACKAGE_liblua=y
CONFIG_PACKAGE_liblucihttp=y
CONFIG_PACKAGE_liblucihttp-lua=y
CONFIG_PACKAGE_libmbedtls=y
CONFIG_PACKAGE_libopenssl=y
CONFIG_PACKAGE_libpcre=y
CONFIG_PACKAGE_librt=y
CONFIG_PACKAGE_libubus-lua=y
CONFIG_PACKAGE_lua=y
CONFIG_PACKAGE_luci=y
CONFIG_PACKAGE_luci-app-commands=y
CONFIG_PACKAGE_luci-app-firewall=y
CONFIG_PACKAGE_luci-app-opkg=y
CONFIG_PACKAGE_luci-base=y
CONFIG_PACKAGE_luci-compat=y
CONFIG_PACKAGE_luci-i18n-base-ja=y
CONFIG_PACKAGE_luci-i18n-commands-ja=y
CONFIG_PACKAGE_luci-i18n-firewall-ja=y
CONFIG_PACKAGE_luci-i18n-opkg-ja=y
CONFIG_PACKAGE_luci-lib-ip=y
CONFIG_PACKAGE_luci-lib-jsonc=y
CONFIG_PACKAGE_luci-lib-nixio=y
CONFIG_PACKAGE_luci-mod-admin-full=y
CONFIG_PACKAGE_luci-mod-network=y
CONFIG_PACKAGE_luci-mod-status=y
CONFIG_PACKAGE_luci-mod-system=y
CONFIG_PACKAGE_luci-proto-ipv6=y
CONFIG_PACKAGE_luci-proto-ppp=y
CONFIG_PACKAGE_luci-theme-bootstrap=y
CONFIG_PACKAGE_rpcd=y
CONFIG_PACKAGE_rpcd-mod-file=y
CONFIG_PACKAGE_rpcd-mod-iwinfo=y
CONFIG_PACKAGE_rpcd-mod-luci=y
CONFIG_PACKAGE_rpcd-mod-rrdns=y
CONFIG_PACKAGE_uhttpd=y
CONFIG_PACKAGE_wget=y
# CONFIG_PACKAGE_wireless-regdb is not set
# CONFIG_PACKAGE_wpad-basic is not set
CONFIG_PACKAGE_zlib=y

I2Cエキスパンダ周辺回路

以下の図の通り構成。改善点あればご指摘ください。

WHR-300HP2-MCP23017.png

MCP23017のスレーブアドレスを 0x20 へ設定するため、A0, A1, A2はブリッジしてGNDに落とす。
最初RESETの接続を忘れ、i2cdetect の際検出されないタイミングがあるなど不安定な状態になった。

DSC_0700.JPG

コンソール

insmod i2c-gpio-custom bus0=0,40,41
指定したGPIOをI2Cとして登録する
ログ:

root@OpenWrt:/tmp# insmod i2c-gpio-custom bus0=0,40,41
[  130.582520] Custom GPIO-based I2C driver version 0.1.1
[  130.593327] i2c-gpio i2c-gpio.0: using pins 40 (SDA) and 41 (SCL)
      
i2cdetect -y 0
指定したI2Cにぶら下がっているスレーブを検出する

root@OpenWrt:/tmp# i2cdetect -y 0
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00:          -- -- -- -- -- -- -- -- -- -- -- -- -- 
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 
20: 20 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 
70: -- -- -- -- -- -- -- --
      
i2cset -y 0 0x20 0x0 0
MCP23017のGPAxのdirectionを全てoutに設定
i2cset -y 0 0x20 0x12 <設定値>
MCP23017のGPAxのうち、HIGHに設定するピンを設定する。ピン番号 (GPA0, GPA1, …) の番号がビット位置に対応する。

例: GPA1をHIGHにする

i2cset -y 0 0x20 0x12 2
      

例: GPA1, GPA2をHIGHにする

i2cset -y 0 0x20 0x12 3
      

その他

雑スクリプト(GPA0からGPA3まで使用している場合)

#!/bin/sh

for i in $(seq 0 100); do
	for j in $(seq 0 7); do
		i2cset -y 0 0x20 0x12 $j
		sleep 1
	done
done

i2cset -y 0 0x20 0x12 0x00

以上。

WN-AC1167GR headerコマンドメモ

念のため

# header
usage:    head    [-h?]      -h This help
  -s    Source filename
  -d    Destination filename
  -a    Auto set parameter
  -t    Types:    
            bootloader (1)
            kernel (3)
            apps (5)
            factoryapps (11)
            userconfig (7)
            langpack (13)
            cust_logo (15)
  -v    Version
  -x    Recovery MD5 file [-u Magickey]
  -r    Vendor ID
  -p    Product ID
  -m    Magic Key(32 bits)
  -c    Code Version
# header -x wnac1167gr_v105.bin
### Decoding  image ####
Decode source file [wnac1167gr_v105.bin]
------- Header Info -------
Vendor  id:  0x0104
Product id:  0x0016
Hardware id:  0x01040016
Version id:  3047
Code Version:  1.5.0
Type: 0x3 [kernel]
comp_file_len:  3493888
comp_file_sum:  0x0
Header sum:  0x9c0
Magic key:  0x30471688
MD5 chksum:  8b2d257816a9d8347dc7422f6389b25
------------------------------
Decode finished, got file [wnac1167gr_v105.bin.bin] with size 3493888 bytes
header: Return OK

# header -x openwrt-ramips-mt7620-iodata_wn-ac1167gr-squashfs-factory.bin
### Decoding  image ####
Decode source file [openwrt-ramips-mt7620-iodata_wn-ac1167gr-squashfs-factory.bin]
------- Header Info -------
Vendor  id:  0x0104
Product id:  0x0016
Hardware id:  0x01040016
Version id:  3047
Code Version:  0.0.0
Type: 0x3 [kernel]
comp_file_len:  5505028
comp_file_sum:  0x0
Header sum:  0x0
Magic key:  0x30471688
MD5 chksum:  a70cf6fe8c264742dc128de672e7492
------------------------------
Decode finished, got file [openwrt-ramips-mt7620-iodata_wn-ac1167gr-squashfs-factory.bin.bin] with size 5505028 bytes
header: Return OK

WSR-2533DHPL factoryメモ

WSR-2533DHPLにおいて、”firmware” 領域内のKernel, RootFSを格納するtrxのMagicは特定のもの(0x5C436F74 (\Cot))でなければ、メーカーファーム上でのチェックで弾かれる模様。
こうなると、initramfsでfactoryを作るしかない。通常のsquashfsでは、trxのMagicをデフォルトの 0x48445230 (HDR0) から変更した場合、OpenWrtがRootFS領域の検出に失敗してマウントできず、boot loopを引き起こすと予想されるため。
WCR-1166DSでは、これが原因でfactoryファーム投入時にboot loopが発生していると思われる。

OpenWrtのコードで関係するのは ここここ

initramfsでのfactoryファーム生成は非常に面倒な上コード量が膨大になり、かつ可読性が著しく低下する傾向にあるので、正直やりたくない。やはり、factoryファームは無しにしてinitramfsファームを用いてブートの上sysupgradeするのが手っ取り早いか。

The tail length is 48! Update len to 7078136!
decodesize 7077892...
cp: can't stat '/usr/sbin/ubi*': No such file or directory
cp: can't stat '/usr/sbin/uboot_env': No such file or directory
token=tools, line=default
token=partitions, line=Kernel
token=Kernel, line=0x0:-
sector: Kernel -> offset=[0x0], write_len=[0x6c0004]
[get_all_mtd] MTD[0]: /dev/mtd0, 0x1000000, 0x10000, ALL
[get_all_mtd] MTD[1]: /dev/mtd1, 0x30000, 0x10000, Bootloader
[get_all_mtd] MTD[2]: /dev/mtd2, 0x10000, 0x10000, Config
[get_all_mtd] MTD[3]: /dev/mtd3, 0x10000, 0x10000, Factory
[get_all_mtd] MTD[4]: /dev/mtd4, 0x7c0000, 0x10000, Kernel
[get_all_mtd] MTD[5]: /dev/mtd5, 0x53b8f0, 0x10000, RootFS
[get_all_mtd] MTD[6]: /dev/mtd6, 0x7c0000, 0x10000, Kernel2
[get_all_mtd] MTD[7]: /dev/mtd7, 0x53b8f0, 0x10000, RootFS2
[get_all_mtd] MTD[8]: /dev/mtd8, 0x10000, 0x10000, glbcfg
[get_all_mtd] MTD[9]: /dev/mtd9, 0x10000, 0x10000, board_data
[merge_sector_info] sector[0]: name=[Kernel], dev=[/dev/mtd4], offset=[0], write_len=[7077892], max_allow_size=[8126464]
[validate_file] /tmp/upload2ev4Qs: Bad trx header, magic=810697800l
[update_image] Validate CRC fail!
[WARN]: upgrade failed!
upload return: 65280
Restarting system.

WSR-2533DHPL stock -> OpenWrt (Fail)

長らくメーカーファーム上でのチェックを通せずにいたが、buffalo-tagを弄ったところパスできるようになったが、その後OpenWrtでブートした際にRootFSをマウントできず止まった。

The tail length is 48! Update len to 7078136!
decodesize 7077892...
cp: can't stat '/usr/sbin/ubi*': No such file or directory
cp: can't stat '/usr/sbin/uboot_env': No such file or directory
token=tools, line=default
token=partitions, line=Kernel
token=Kernel, line=0x0:-
sector: Kernel -> offset=[0x0], write_len=[0x6c0004]
[get_all_mtd] MTD[0]: /dev/mtd0, 0x1000000, 0x10000, ALL
[get_all_mtd] MTD[1]: /dev/mtd1, 0x30000, 0x10000, Bootloader
[get_all_mtd] MTD[2]: /dev/mtd2, 0x10000, 0x10000, Config
[get_all_mtd] MTD[3]: /dev/mtd3, 0x10000, 0x10000, Factory
[get_all_mtd] MTD[4]: /dev/mtd4, 0x7c0000, 0x10000, Kernel
[get_all_mtd] MTD[5]: /dev/mtd5, 0x53b8f0, 0x10000, RootFS
[get_all_mtd] MTD[6]: /dev/mtd6, 0x7c0000, 0x10000, Kernel2
[get_all_mtd] MTD[7]: /dev/mtd7, 0x53b8f0, 0x10000, RootFS2
[get_all_mtd] MTD[8]: /dev/mtd8, 0x10000, 0x10000, glbcfg
[get_all_mtd] MTD[9]: /dev/mtd9, 0x10000, 0x10000, board_data
[merge_sector_info] sector[0]: name=[Kernel], dev=[/dev/mtd4], offset=[0], write_len=[7077892], max_allow_size=[8126464]
[validate_file] freeram=[59179008] bufferram=[3739648]
/tmp/uploadMs88aC: CRC OK
[do_default_update] filesize=[7077892], offset=[0]
[do_default_update] Erase MTD[Kernel]: start
[do_default_update] Erase MTD[Kernel]: end
[do_default_update] Write MTD[Kernel]: start
[do_default_update] Write MTD[Kernel]: end
[switch_bank] to 0, return 0
upload return: 0
MReconnect to midcore failed.
[mapi_tx_transc_req] write msg length fail Connection refused
Restarting system.

===================================================================
                MT7621   stage1 code 10:33:55 (ASIC)
                CPU=500000000 HZ BUS=166666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL2 FB_DL: 0xb, 1/0 = 547/477 2D000000
PLL3 FB_DL: 0x15, 1/0 = 580/444 55000000
PLL4 FB_DL: 0x18, 1/0 = 744/280 61000000
do DDR setting..[01F40000]
Apply DDR3 Setting...(use customer AC)
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
      --------------------------------------------------------------------------------
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    1
000E:|    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1
000F:|    0    0    0    0    1    1    1    1    1    1    1    1    1    1    0    0
0010:|    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0
0011:|    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0
0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
rank 0 coarse = 15
rank 0 fine = 72
B:|    0    0    0    0    0    0    0    0    0    0    1    1    1    0    0    0
opt_dle value:11
DRAMC_R0DELDLY[018]=00001E1F
==================================================================
                RX      DQS perbit delay software calibration 
==================================================================
1.0-15 bit dq delay value
==================================================================
bit|     0  1  2  3  4  5  6  7  8  9
--------------------------------------
0 |    13 13 15 15 11 12 13 10 9 10 
10 |    11 11 13 13 11 12 
--------------------------------------

==================================================================
2.dqs window
x=pass dqs delay value (min~max)center 
y=0-7bit DQ of every group
input delay:DQS0 =31 DQS1 = 30
==================================================================
bit     DQS0     bit      DQS1
0  (1~58)29  8  (1~56)28
1  (1~56)28  9  (1~54)27
2  (1~60)30  10  (1~59)30
3  (1~61)31  11  (1~57)29
4  (1~58)29  12  (1~58)29
5  (1~59)30  13  (1~55)28
6  (1~61)31  14  (1~60)30
7  (1~60)30  15  (1~57)29
==================================================================
3.dq delay value last
==================================================================
bit|    0  1  2  3  4  5  6  7  8   9
--------------------------------------
0 |    15 15 15 15 13 13 13 11 11 13 
10 |    11 12 14 15 11 13 
==================================================================
==================================================================
     TX  perbyte calibration 
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000 
dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
DQ loop=15, cmp_err_1 = ffff01ae
DQ loop=14, cmp_err_1 = ffff0180
DQ loop=13, cmp_err_1 = ffff0080
dqs_perbyte_dly.last_dqdly_pass[1]=13,  finish count=1 
DQ loop=12, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=12,  finish count=2 
byte:0, (DQS,DQ)=(9,8)
byte:1, (DQS,DQ)=(9,8)
20,data:99
[EMI] DRAMC calibration passed

===================================================================
                MT7621   stage1 code done 
                CPU=500000000 HZ BUS=166666666 HZ
===================================================================


U-Boot 1.1.3 (Aug  5 2016 - 17:01:25) 0.02

Board: Ralink APSoC DRAM:  128 MB
relocate_code Pointer at: 87fb8000

Config XHCI 40M PLL 
******************************
Software System Reset Occurred
******************************
flash manufacture id: ef, device id 40 18
find flash: W25Q128BV
============================================ 
Ralink UBoot Version: 5.0.0.0
-------------------------------------------- 
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection 
DRAM_TYPE: DDR3 
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: 16 MBytes NOR Flash
Date:Aug  5 2016  Time:17:01:25
============================================ 
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768 

 ##### The CPU freq = 880 MHZ #### 
 estimate memory size =128 Mbytes
#Reset_MT7530
set LAN/WAN WLLLL

Please choose the operation: 
   1: Load system code to SDRAM via TFTP. 
   2: Load system code then write to Flash via TFTP. 
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   7: Load Boot Loader code then write to Flash via Serial. 
   9: Load Boot Loader code then write to Flash via TFTP.                                                                  0 
   
3: System Boot system code via Flash0.
## Booting image at bc050000 ...

=================================================
Check image validation:
Image1 Trx Check --> 
## check_trx, crc=-575298866, *crc_ret=-575298866.
OK
Image1 Header Magic Number --> OK
Image1 Header Checksum --> OK
Image1 Data Checksum --> OK

=================================================

=================================================
Check image validation:
Image2 Trx Check --> 
## check_trx, crc=-1234505007, *crc_ret=-1234505007.
OK
Image2 Header Magic Number --> OK
Image2 Header Checksum --> OK
Image2 Data Checksum --> OK

=================================================
## check Image1 return 0, check Image2 return 0, Image1 crc=-575298866, Image2 crc=-1234505007.
Image1 is ok!
Image2 is not same as Image1, copy Image1 to Image2!

Copy Image:
Image1(0x50000) to Image2(0x810000), size=0x68E000
........................................................................................................
........................................................................................................
.
.
Done!
   Image Name:   MIPS OpenWrt Linux-4.14.143
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    2006978 Bytes =  1.9 MB
   Load Address: 80001000
   Entry Point:  80001000
   Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 128

Starting kernel ...

[    0.000000] Linux version 4.14.143 (musashino205@Taiha.Net) (gcc version 7.4.0 (OpenWrt GCC 7.4.0 r0+11016-9bf7431d38)) #0 SMP Sun Sep 15 14:46:05 2019
[    0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[    0.000000] bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[    0.000000] MIPS: machine is Buffalo WSR-2533DHPL
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 08000000 @ 00000000 (usable)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] VPE topology {2,2} total 4
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000]   HighMem  empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] random: get_random_bytes called from start_kernel+0x9c/0x4d8 with crng_init=0
[    0.000000] percpu: Embedded 14 pages/cpu s26064 r8192 d23088 u57344
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 32480
[    0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2
[    0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[    0.000000] Writing ErrCtl register=000492b0
[    0.000000] Readback ErrCtl register=000492b0
[    0.000000] Memory: 121868K/131072K available (4789K kernel code, 246K rwdata, 1036K rodata, 1276K init, 254K bss, 9204K reserved, 0K cma-reserved, 0K highmem)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] Hierarchical RCU implementation.
[    0.000000] NR_IRQS: 256
[    0.000000] CPU Clock: 880MHz
[    0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[    0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[    0.000009] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
[    0.015496] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
[    0.087822] pid_max: default: 32768 minimum: 301
[    0.097183] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.110205] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.126315] Hierarchical SRCU implementation.
[    0.135850] smp: Bringing up secondary CPUs ...
[    0.146319] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.146329] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.146340] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.146477] CPU1 revision is: 0001992f (MIPS 1004Kc)
[    0.205169] Synchronize counters for CPU 1: done.
[    0.276364] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.276372] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.276381] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.276458] CPU2 revision is: 0001992f (MIPS 1004Kc)
[    0.326109] Synchronize counters for CPU 2: done.
[    0.387189] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.387197] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.387205] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.387279] CPU3 revision is: 0001992f (MIPS 1004Kc)
[    0.445677] Synchronize counters for CPU 3: done.
[    0.505287] smp: Brought up 1 node, 4 CPUs
[    0.517696] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.537183] futex hash table entries: 1024 (order: 3, 32768 bytes)
[    0.549730] pinctrl core: initialized pinctrl subsystem
[    0.561419] NET: Registered protocol family 16
[    0.579962] pull PCIe RST: RALINK_RSTCTRL = 4000000
[    0.890005] release PCIe RST: RALINK_RSTCTRL = 7000000
[    0.900071] ***** Xtal 40MHz *****
[    0.906803] release PCIe RST: RALINK_RSTCTRL = 7000000
[    0.917011] Port 0 N_FTS = 1b105000
[    0.923908] Port 1 N_FTS = 1b105000
[    0.930833] Port 2 N_FTS = 1b102800
[    2.089681] PCIE2 no card, disable it(RST&CLK)
[    2.098375]  -> 21007f2
[    2.103193] PCIE0 enabled
[    2.108394] PCIE1 enabled
[    2.113573] PCI host bridge /pcie@1e140000 ranges:
[    2.123096]  MEM 0x0000000060000000..0x000000006fffffff
[    2.133463]   IO 0x000000001e160000..0x000000001e16ffff
[    2.143829] PCI coherence region base: 0xbfbf8000, mask/settings: 0x60000000
[    2.167190] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    2.178509] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    2.189746] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    2.202416] PCI host bridge to bus 0000:00
[    2.210435] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[    2.224099] pci_bus 0000:00: root bus resource [io  0xffffffff]
[    2.235844] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[    2.249312] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[    2.267225] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
[    2.280256] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
[    2.294069] pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000]
[    2.307198] pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000]
[    2.321029] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
[    2.334502] pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
[    2.347983] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
[    2.361468] pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
[    2.374952] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
[    2.389463] pci 0000:00:00.0: PCI bridge to [bus 01]
[    2.399292] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
[    2.412791] pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
[    2.427308] pci 0000:00:01.0: PCI bridge to [bus 02]
[    2.437130] pci 0000:00:01.0:   bridge window [mem 0x60100000-0x601fffff]
[    2.452070] clocksource: Switched to clocksource GIC
[    2.463868] NET: Registered protocol family 2
[    2.473126] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[    2.486864] TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
[    2.499464] TCP: Hash tables configured (established 1024 bind 1024)
[    2.512225] UDP hash table entries: 256 (order: 1, 8192 bytes)
[    2.523722] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[    2.536386] NET: Registered protocol family 1
[    2.782013] 4 CPUs re-calibrate udelay(lpj = 2924544)
[    2.793455] Crashlog allocated RAM at address 0x3f00000
[    2.804005] workingset: timestamp_bits=14 max_order=15 bucket_order=1
[    2.821011] random: fast init done
[    2.831197] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    2.842705] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    2.865629] io scheduler noop registered
[    2.873357] io scheduler deadline registered (default)
[    2.884372] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[    2.898171] console [ttyS0] disabled
[    2.905238] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A
[    2.923164] console [ttyS0] enabled
[    2.923164] console [ttyS0] enabled
[    2.936951] bootconsole [early0] disabled
[    2.936951] bootconsole [early0] disabled
[    2.954651] MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error
[    2.968911] spi-mt7621 1e000b00.spi: sys_freq: 220000000
[    2.989274] m25p80 spi0.0: w25q128 (16384 Kbytes)
[    2.998721] 7 fixed-partitions partitions found on MTD device spi0.0
[    3.011375] Creating 7 MTD partitions on "spi0.0":
[    3.020931] 0x000000000000-0x000000030000 : "u-boot"
[    3.031863] 0x000000030000-0x000000040000 : "u-boot-env"
[    3.043397] 0x000000040000-0x000000050000 : "factory"
[    3.054441] 0x000000050000-0x000000810000 : "firmware"
[    3.068725] 0x000000810000-0x000000fd0000 : "Kernel2"
[    3.079818] 0x000000fd0000-0x000000fe0000 : "glbcfg"
[    3.090684] 0x000000fe0000-0x000001000000 : "board_data"
[    3.102869] libphy: Fixed MDIO Bus: probed
[    3.174069] libphy: mdio: probed
[    4.582213] mtk_soc_eth 1e100000.ethernet: loaded mt7530 driver
[    4.594638] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 20
[    4.613452] NET: Registered protocol family 10
[    4.623865] Segment Routing with IPv6
[    4.631241] NET: Registered protocol family 17
[    4.640193] 8021q: 802.1Q VLAN Support v1.8
[    4.650825] hctosys: unable to open rtc device (rtc0)
[    4.661736] VFS: Cannot open root device "(null)" or unknown-block(0,0): error -6
[    4.676655] Please append a correct "root=" boot option; here are the available partitions:
[    4.693291] 1f00             192 mtdblock0 
[    4.693298]  (driver?)
[    4.706301] 1f01              64 mtdblock1 
[    4.706306]  (driver?)
[    4.719316] 1f02              64 mtdblock2 
[    4.719321]  (driver?)
[    4.732340] 1f03            7936 mtdblock3 
[    4.732346]  (driver?)
[    4.745348] 1f04            7936 mtdblock4 
[    4.745353]  (driver?)
[    4.758356] 1f05              64 mtdblock5 
[    4.758361]  (driver?)
[    4.771362] 1f06             128 mtdblock6 
[    4.771368]  (driver?)
[    4.784386] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
[    4.802463] Rebooting in 1 seconds..

WRC-1167FS stock -> OpenWrt

とりあえずfactoryファームを正しい状態にdecodeされる形で組めたので、投入テスト。
stockで SQUASHFS error が大量に吐かれるのは何だろうか…(出ないこともあった)

------- ELECOM1701 Header Info
Image Header Size      : 0x0038
Image Header ID        : ELECOM
Image Product Name     : WRC-1167FS
Image Version          : 0.00
------------------------------
------- Header Info
Image Header Size      : 0x0074
Image Header Magic Code: 0x031d6129
Image Data Size        : 6291456
Image Type             : 0x6 [kernel_elecom1701]
Compression Type       : 0x0
Model ID               : 0x00228000
Build Date             : 1970-01-1
Version Firmware       : 
Version Code SCM       : 
Version Config         :                                 
Data CRC Checksum      : 0x337EBA50
Header CRC Checksum    : 0x0
------------------------------
FWHANDLE, DECODE PASS
Erasing blocks: 96/96 (100%)
Writing data: 6144k/6144k (100%)
Verifying data: 6144k/6144k (100%)
The system is going down NOW!
[43306.704000] SQUASHFS error: zlib_inflate error, data probably corrupt
[43306.728000] SQUASHFS error: squashfs_read_data failed to read block 0x1d6305
[43306.740000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43306.756000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43306.768000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43306.780000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43306.796000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43306.808000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43306.820000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43306.836000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43306.848000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43306.864000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43306.876000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43306.888000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43306.904000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43306.916000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43306.928000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43306.944000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43306.956000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43306.972000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43306.984000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43306.996000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43307.012000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43307.024000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43307.036000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43307.052000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43307.064000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43307.080000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
[43307.092000] SQUASHFS error: Unable to read fragment cache entry [1d6305]
[43307.104000] SQUASHFS error: Unable to read page, block 1d6305, size 9161
Sent SIGKILL to all processes
Requesting system reboot
[43308.712000] Restarting system.
[04060C09][04060C09]
DDR Calibration DQS reg = 00008787


U-Boot 1.1.3 (Oct 23 2017 - 16:14:35)

Board: Ralink APSoC DRAM:  64 MB
relocate_code Pointer at: 83fa0000
******************************
Software System Reset Occurred
******************************
flash manufacture id: ef, device id 40 18
find flash: W25Q128BV
============================================ 
Ralink UBoot Version: 5.0.0.0
-------------------------------------------- 
ASIC 7628_MP (Port5None)
DRAM component: 512 Mbits DDR, width 16
DRAM bus: 16 bit
Total memory: 64 MBytes
Flash component: SPI Flash
Date:Oct 23 2017  Time:16:14:35
============================================ 
icache: sets:512, ways:4, linesz:32 ,total:65536
dcache: sets:256, ways:4, linesz:32 ,total:32768 

 ##### The CPU freq = 580 MHZ #### 
 estimate memory size = 64 Mbytes
RESET MT7628 PHY!!!!!!
Please choose the operation: 
   1: Load system code to SDRAM via TFTP. 
   2: Load system code then write to Flash via TFTP. 
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   7: Load Boot Loader code then write to Flash via Serial. 
   9: Load Boot Loader code then write to Flash via TFTP. 
default: 3                                                                                                                 0 
   
3: System Boot system code via Flash.
## Booting image at bc050000 ...
   Image Name:   MIPS OpenWrt Linux-4.14.143
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    1669570 Bytes =  1.6 MB
   Load Address: 80000000
   Entry Point:  80000000
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80000000) ...
## Giving linux memsize in MB, 64

Starting kernel ...

[    0.000000] Linux version 4.14.143 (musashino205@Taiha.Net) (gcc version 7.4.0 (OpenWrt GCC 7.4.0 r0+11022-f01af852e5)) #0 Sun Sep 15 03:19:24 2019
[    0.000000] Board has DDR2
[    0.000000] Analog PMU set to hw control
[    0.000000] Digital PMU set to hw control
[    0.000000] SoC Type: MediaTek MT7628AN ver:1 eco:2
[    0.000000] bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 00019655 (MIPS 24KEc)
[    0.000000] MIPS: machine is ELECOM WRC-1167FS
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 04000000 @ 00000000 (usable)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] Primary instruction cache 64kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x0000000003ffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x0000000003ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000003ffffff]
[    0.000000] random: get_random_bytes called from start_kernel+0x98/0x4a0 with crng_init=0
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 16240
[    0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2
[    0.000000] PID hash table entries: 256 (order: -2, 1024 bytes)
[    0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
[    0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
[    0.000000] Writing ErrCtl register=000779f0
[    0.000000] Readback ErrCtl register=000779f0
[    0.000000] Memory: 58372K/65536K available (3919K kernel code, 185K rwdata, 892K rodata, 1204K init, 206K bss, 7164K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] NR_IRQS: 256
[    0.000000] intc: using register map from devicetree
[    0.000000] CPU Clock: 580MHz
[    0.000000] timer_probe: no matching timers found
[    0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 6590553264 ns
[    0.000010] sched_clock: 32 bits at 290MHz, resolution 3ns, wraps every 7405115902ns
[    0.015371] Calibrating delay loop... 385.84 BogoMIPS (lpj=1929216)
[    0.087589] pid_max: default: 32768 minimum: 301
[    0.096986] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.109944] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.130499] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.149876] futex hash table entries: 256 (order: -1, 3072 bytes)
[    0.162027] pinctrl core: initialized pinctrl subsystem
[    0.173329] NET: Registered protocol family 16
[    0.290156] mt7620-pci 10140000.pcie: Port 0 N_FTS = 1b105000
[    0.451172] PCI host bridge /pcie@10140000 ranges:
[    0.460516]  MEM 0x0000000020000000..0x000000002fffffff
[    0.470830]   IO 0x0000000010160000..0x000000001016ffff
[    0.500056] mt7621_gpio 10000600.gpio: registering 32 gpios
[    0.511272] mt7621_gpio 10000600.gpio: registering 32 gpios
[    0.522397] mt7621_gpio 10000600.gpio: registering 32 gpios
[    0.534247] PCI host bridge to bus 0000:00
[    0.542215] pci_bus 0000:00: root bus resource [mem 0x20000000-0x2fffffff]
[    0.555863] pci_bus 0000:00: root bus resource [io  0xffffffff]
[    0.567501] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[    0.580917] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[    0.597737] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
[    0.610732] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
[    0.624454] pci 0000:00:00.0: BAR 8: assigned [mem 0x20000000-0x200fffff]
[    0.637870] pci 0000:00:00.0: BAR 9: assigned [mem 0x20100000-0x201fffff pref]
[    0.652146] pci 0000:00:00.0: BAR 1: assigned [mem 0x20200000-0x2020ffff]
[    0.665570] pci 0000:01:00.0: BAR 0: assigned [mem 0x20000000-0x200fffff 64bit]
[    0.680026] pci 0000:01:00.0: BAR 6: assigned [mem 0x20100000-0x2010ffff pref]
[    0.694282] pci 0000:00:00.0: PCI bridge to [bus 01]
[    0.704078] pci 0000:00:00.0:   bridge window [mem 0x20000000-0x200fffff]
[    0.717505] pci 0000:00:00.0:   bridge window [mem 0x20100000-0x201fffff pref]
[    0.736698] clocksource: Switched to clocksource MIPS
[    0.747967] NET: Registered protocol family 2
[    0.757384] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[    0.771089] TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
[    0.783600] TCP: Hash tables configured (established 1024 bind 1024)
[    0.796304] UDP hash table entries: 256 (order: 0, 4096 bytes)
[    0.807770] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[    0.820453] NET: Registered protocol family 1
[    0.832838] Crashlog allocated RAM at address 0x3f00000
[    0.844881] workingset: timestamp_bits=14 max_order=14 bucket_order=0
[    0.864744] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.876196] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    0.908291] io scheduler noop registered
[    0.915904] io scheduler deadline registered (default)
[    0.927039] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[    0.940675] console [ttyS0] disabled
[    0.947712] 10000c00.uartlite: ttyS0 at MMIO 0x10000c00 (irq = 28, base_baud = 2500000) is a 16550A
[    0.965533] console [ttyS0] enabled
[    0.965533] console [ttyS0] enabled
[    0.979266] bootconsole [early0] disabled
[    0.979266] bootconsole [early0] disabled
[    0.996371] spi-mt7621 10000b00.spi: sys_freq: 193333333
[    1.021181] m25p80 spi0.0: w25q128 (16384 Kbytes)
[    1.030557] 5 fixed-partitions partitions found on MTD device spi0.0
[    1.043143] Creating 5 MTD partitions on "spi0.0":
[    1.052647] 0x000000000000-0x000000030000 : "u-boot"
[    1.063444] 0x000000030000-0x000000040000 : "u-boot-env"
[    1.074905] 0x000000040000-0x000000050000 : "factory"
[    1.085896] 0x000000050000-0x000000780000 : "firmware"
[    1.100090] 2 uimage-fw partitions found on MTD device firmware
[    1.111878] Creating 2 MTD partitions on "firmware":
[    1.121728] 0x000000000000-0x000000197a02 : "kernel"
[    1.132503] 0x000000197a02-0x000000730000 : "rootfs"
[    1.143221] mtd: device 5 (rootfs) set to be root filesystem
[    1.156083] 1 squashfs-split partitions found on MTD device rootfs
[    1.168396] 0x0000005f0000-0x000000730000 : "rootfs_data"
[    1.180046] 0x000000780000-0x000000800000 : "storage"
[    1.191697] libphy: Fixed MDIO Bus: probed
[    1.212238] rt3050-esw 10110000.esw: link changed 0x00
[    1.224104] mtk_soc_eth 10100000.ethernet eth0: mediatek frame engine at 0xb0100000, irq 5
[    1.242355] NET: Registered protocol family 10
[    1.255536] Segment Routing with IPv6
[    1.262985] NET: Registered protocol family 17
[    1.271879] 8021q: 802.1Q VLAN Support v1.8
[    1.286868] VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
[    1.307441] Freeing unused kernel memory: 1204K
[    1.316404] This architecture does not have kernel memory protection.
[    1.970141] init: Console is alive
[    1.977215] init: - watchdog -
[    2.550349] random: fast init done
[    2.756372] kmodloader: loading kernel modules from /etc/modules-boot.d/*
[    2.937396] kmodloader: done loading kernel modules from /etc/modules-boot.d/*
[    2.962292] init: - preinit -
[    4.384411] rt3050-esw 10110000.esw: link changed 0x00
Press the [f] key and hit [enter] to enter failsafe mode
Press the [1], [2], [3[    4.583806] random: procd: uninitialized urandom read (4 bytes read)
] or [4] key and hit [enter] to select the debug level
[    7.720341] mount_root: jffs2 not ready yet, using temporary tmpfs overlay
[    7.764542] urandom-seed: Seed file not found (/etc/urandom.seed)
[    7.904087] procd: - early -
[    7.909996] procd: - watchdog -
[    7.920624] rt3050-esw 10110000.esw: link changed 0x10
[    8.505187] procd: - watchdog -
[    8.511829] procd: - ubus -
[    8.593332] random: ubusd: uninitialized urandom read (4 bytes read)
[    8.605999] rt3050-esw 10110000.esw: link changed 0x18
[    8.727290] random: ubusd: uninitialized urandom read (4 bytes read)
[    8.740510] random: ubusd: uninitialized urandom read (4 bytes read)
[    8.754288] procd: - init -
Please press Enter to activate this console.
[    9.916960] kmodloader: loading kernel modules from /etc/modules.d/*
[   10.140706] urngd: v1.0.0 started.
[   10.235574] nat46: module (version 683fbd2b765506332a1af141545652bf58f03166) loaded.
[   10.283603] ip6_tables: (C) 2000-2006 Netfilter Core Team
[   10.316489] Loading modules backported from Linux version v5.3-rc4-0-gd45331b00ddb
[   10.331554] Backport generated by backports.git v5.3-rc4-1-0-g4ec72687
[   10.398397] ip_tables: (C) 2000-2006 Netfilter Core Team
[   10.442233] nf_conntrack version 0.5.0 (1024 buckets, 4096 max)
[   10.682682] xt_time: kernel timezone is -0000
[   10.977902] random: crng init done
[   10.984640] random: 6 urandom warning(s) missed due to ratelimiting
[   11.034113] mt76_wmac 10300000.wmac: ASIC revision: 76280001
[   12.068989] mt76_wmac 10300000.wmac: Firmware Version: 20151201
[   12.080789] mt76_wmac 10300000.wmac: Build Time: 20151201183641
[   12.106712] mt76_wmac 10300000.wmac: firmware init done
[   12.320920] mt76x2e 0000:01:00.0: card - bus=0x1, slot = 0x0 irq=4
[   12.333476] mt76x2e 0000:01:00.0: ASIC revision: 76120044
[   13.305510] mt76x2e 0000:01:00.0: ROM patch build: 20141115060606a
[   13.323665] mt76x2e 0000:01:00.0: Firmware Version: 0.0.00
[   13.334612] mt76x2e 0000:01:00.0: Build: 1
[   13.342731] mt76x2e 0000:01:00.0: Build Time: 201507311614____
[   13.376709] mt76x2e 0000:01:00.0: Firmware running!
[   13.413026] PPP generic driver version 2.4.2
[   13.434463] NET: Registered protocol family 24
[   13.457255] kmodloader: done loading kernel modules from /etc/modules.d/*
[   81.007133] rt3050-esw 10110000.esw: link changed 0x00
[   84.725977] rt3050-esw 10110000.esw: link changed 0x10
[   85.210456] rt3050-esw 10110000.esw: link changed 0x18
[   87.717761] jffs2_scan_eraseblock(): End of filesystem marker found at 0x0
[   87.766439] br-lan: port 1(eth0.1) entered blocking state
[   87.777384] br-lan: port 1(eth0.1) entered disabled state
[   87.788486] device eth0.1 entered promiscuous mode
[   87.798020] device eth0 entered promiscuous mode
[   87.822336] jffs2_build_filesystem(): unlocking the mtd device... 
[   87.822399] done.
[   87.838517] jffs2_build_filesystem(): erasing all blocks after the end marker... 
[   87.963432] br-lan: port 1(eth0.1) entered blocking state
[   87.989006] br-lan: port 1(eth0.1) entered forwarding state
[   88.000788] IPv6: ADDRCONF(NETDEV_UP): br-lan: link is not ready
[   88.797252] IPv6: ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready
[   92.168458] done.
[   92.172311] jffs2: notice: (1302) jffs2_build_xattr_subsystem: complete building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of xref (0 dead, 0 orphan) found.
[   92.572867] overlayfs: upper fs does not support tmpfile.



BusyBox v1.31.0 () built-in shell (ash)

  _______                     ________        __
 |       |.-----.-----.-----.|  |  |  |.----.|  |_
 |   -   ||  _  |  -__|     ||  |  |  ||   _||   _|
 |_______||   __|_____|__|__||________||__|  |____|
          |__| W I R E L E S S   F R E E D O M
 -----------------------------------------------------
 OpenWrt SNAPSHOT, r0+11022-f01af852e5
 -----------------------------------------------------
=== WARNING! =====================================
There is no root password defined on this device!
Use the "passwd" command to set up a new password
in order to prevent unauthorized SSH logins.
--------------------------------------------------
root@OpenWrt:/#