タグ: MT7621A

WNPR2600G

以前ファームウェアを調べた際にMT7621を搭載していることを把握しており、つい最近某フリマサイトで安価な出品を見かけて衝動的に購入してしまった。
弄っていくのでメモ。

Switch

zone WAN LAN
port
(WNPR2600G)
インターネット LAN4 LAN3 LAN2 LAN1
port
(MT7530)
port0 port1 port2 port3 port4

MAC

Config (u-boot-env), eeprom内に有。

  • LAN: 34:76:C5:xx:xx:1E (Config, ethaddr (text))
  • WAN: 34:76:C5:xx:xx:1D (Config, wanaddr (text))
  • 2G: 34:76:C5:xx:xx:1E (Factory, 0x4 (hex))
  • 5G: 34:76:C5:xx:xx:1F (Factory, 0x8004 (hex))

U-Boot

  • help
    U-Boot 1.1.3 (May 25 2016 - 17:17:58)
    MT7621 # help
    ?       - alias for 'help'
    bootm   - boot application image from memory
    cp      - memory copy
    elx_check      - check ELX image
    erase   - erase SPI FLASH memory
    go      - start application at address 'addr'
    help    - print online help
    md      - memory display
    mdio   - Ralink PHY register R/W command !!
    mm      - memory modify (auto-incrementing)
    mw      - memory write (fill)
    nm      - memory modify (constant address)
    printenv- print environment variables
    reset   - Perform RESET of the CPU
    rf      - read/write rf register
    saveenv - save environment variables to persistent storage
    setenv  - set environment variables
    spi     - spi command
    tftpboot- boot image via network using TFTP protocol
    version - print monitor version
    

  • version
    MT7621 # version
    
    U-Boot 1.1.3 (May 25 2016 - 17:17:58)
    

  • printenv
    ELECOM機関連の設定値が散見される

    MT7621 # printenv
    bootcmd=tftp
    baudrate=57600
    ethaddr="34:76:C5:**:**:1E"
    ramargs=setenv bootargs root=/dev/ram rw
    addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname):$(netdev):off
    addmisc=setenv bootargs $(bootargs) console=ttyS0,$(baudrate) ethaddr=$(ethaddr) panic=1
    flash_self=run ramargs addip addmisc;bootm $(kernel_addr) $(ramdisk_addr)
    kernel_addr=BFC40000
    u-boot=u-boot.bin
    load=tftp 8A100000 $(u-boot)
    u_b=protect off 1:0-1;era 1:0-1;cp.b 8A100000 BC400000 $(filesize)
    loadfs=tftp 8A100000 root.cramfs
    u_fs=era bc540000 bc83ffff;cp.b 8A100000 BC540000 $(filesize)
    test_tftp=tftp 8A100000 root.cramfs;run test_tftp
    ethact=Eth0 (10/100-M)
    language_code=jp
    domain=1
    pincode=********
    wlanaddr=BC:5C:4C:**:**:**
    kver=1.04   
    sn=12345678901234567890123456789012
    usboot=0
    bver=4.0.1.5
    dom2=1
    wanaddr=34:76:C5:**:**:1D
    bootdelay=2
    filesize=52a000
    fileaddr=80A00000
    ipaddr=192.168.99.9
    serverip=192.168.99.8
    autostart=no
    bootfile=uImage_ELECOM-WRC-2533GHBK-I
    hw_id=0104003a
    op_mode=0
    stdin=serial
    stdout=serial
    stderr=serial
    
    Environment size: 1051/4092 bytes
    

Kernel

コンソールにパスワードが掛けられている

  • uname -a
    # uname -a
    Linux WNPR2600G 3.2.9 #3 SMP Tue Oct 31 18:12:39 CST 2017 mips GNU/Linux
    

  • cat /proc/version
    # cat /proc/version
    Linux version 3.2.9 (root@***-pc) (gcc version 4.6.4 (Buildroot 2013.05) ) #3 SMP Tue Oct 31 18:12:39 CST 2017
    

  • cat /proc/cpuinfo
    # cat /proc/version
    Linux version 3.2.9 (root@jim-pc) (gcc version 4.6.4 (Buildroot 2013.05) ) #3 SMP Tue Oct 31 18:12:39 CST 2017
    # cat /proc/cpuinfo
    system type             : Mediatek MT7621 ver:1 eco:3
    machine                 : Ralink MT7621
    processor               : 0
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0000, 0x0000, 0x0000, 0x0000]
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 1
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0000, 0x0000, 0x0000, 0x0000]
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 2
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0000, 0x0000, 0x0000, 0x0000]
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 3
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0000, 0x0000, 0x0000, 0x0000]
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    

  • cat /proc/meminfo
    # cat /proc/meminfo
    MemTotal:         125776 kB
    MemFree:           78028 kB
    Buffers:            3396 kB
    Cached:            12056 kB
    SwapCached:            0 kB
    Active:             4536 kB
    Inactive:          13272 kB
    Active(anon):       2412 kB
    Inactive(anon):      852 kB
    Active(file):       2124 kB
    Inactive(file):    12420 kB
    Unevictable:           0 kB
    Mlocked:               0 kB
    SwapTotal:             0 kB
    SwapFree:              0 kB
    Dirty:                 0 kB
    Writeback:             0 kB
    AnonPages:          2400 kB
    Mapped:             1912 kB
    Shmem:               904 kB
    Slab:              15696 kB
    SReclaimable:        844 kB
    SUnreclaim:        14852 kB
    KernelStack:         808 kB
    PageTables:          428 kB
    NFS_Unstable:          0 kB
    Bounce:                0 kB
    WritebackTmp:          0 kB
    CommitLimit:       62888 kB
    Committed_AS:     349380 kB
    VmallocTotal:    1048372 kB
    VmallocUsed:        7548 kB
    VmallocChunk:    1024940 kB
    

  • cat /proc/mtd
    # cat /proc/mtd
    dev:    size   erasesize  name
    mtd0: 01000000 00010000 "ALL"
    mtd1: 00030000 00010000 "Bootloader"
    mtd2: 00010000 00010000 "Config"
    mtd3: 00010000 00010000 "Factory"
    mtd4: 00da0000 00010000 "Kernel"
    mtd5: 00bd0000 00010000 "user"
    mtd6: 00190000 00010000 "manufacture"
    mtd7: 00080000 00010000 "storage"
    

  • ls -al /sys/class/leds/
    # ls -al /sys/class/leds/
    lrwxrwxrwx    1         0 Sep  1 00:05 PoE -> ../../devices/platform/leds-gpio/leds/PoE
    lrwxrwxrwx    1         0 Sep  1 00:00 2g_led -> ../../devices/platform/leds-gpio/leds/2g_led
    lrwxrwxrwx    1         0 Sep  1 00:00 5g_led -> ../../devices/platform/leds-gpio/leds/5g_led
    lrwxrwxrwx    1         0 Sep  1 00:00 DIAG -> ../../devices/platform/leds-gpio/leds/DIAG
    lrwxrwxrwx    1         0 Sep  1 00:00 power_led -> ../../devices/platform/leds-gpio/leds/power_led
    drwxr-xr-x   20         0 Sep  1 00:00 ..
    drwxr-xr-x    2         0 Sep  1 00:00 .
    

  • bootlog
    MT7615関連のログがあまりに多すぎるため、無線をオフにした状態のログ。

    
    ===================================================================
                    MT7621   stage1 code Mar 12 2015 14:43:30 (ASIC)
                    CPU=500000000 HZ BUS=125000000 HZ
    ==================================================================
    Change MPLL source from XTAL to CR...
    do MEMPLL setting..
    MEMPLL Config : 0x11000000
    3PLL mode + External loopback
    === XTAL-40Mhz === DDR-1200Mhz ===
    PLL4 FB_DL: 0x3, 1/0 = 567/457 0D000000
    PLL2 FB_DL: 0x11, 1/0 = 665/359 45000000
    PLL3 FB_DL: 0x14, 1/0 = 691/333 51000000
    do DDR setting..[01F40000]
    Apply DDR3 Setting...(use default AC)
              0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
          --------------------------------------------------------------------------------
    0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000E:|    0    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1
    000F:|    0    0    0    0    0    1    1    1    1    1    1    1    1    1    1    1
    0010:|    1    1    1    1    1    1    1    1    1    1    1    0    0    0    0    0
    0011:|    1    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0
    0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    DRAMC_DQSCTL1[0e0]=14000000
    DRAMC_DQSGCTL[124]=80000000
    rank 0 coarse = 16
    rank 0 fine = 40
    B:|    0    0    0    0    0    0    0    1    1    1    0    0    0    0    0    0
    opt_dle value:8
    DRAMC_DDR2CTL[07c]=C287220D
    DRAMC_PADCTL4[0e4]=000022B3
    DRAMC_DQIDLY1[210]=0B08070A
    DRAMC_DQIDLY2[214]=05070708
    DRAMC_DQIDLY3[218]=0C070705
    DRAMC_DQIDLY4[21c]=0A070B08
    DRAMC_R0DELDLY[018]=00002222
    ==================================================================
                    RX      DQS perbit delay software calibration 
    ==================================================================
    1.0-15 bit dq delay value
    ==================================================================
    bit|     0  1  2  3  4  5  6  7  8  9
    --------------------------------------
    0 |    9 5 7 8 6 6 6 5 1 7 
    10 |    6 9 7 8 6 9 
    --------------------------------------
    
    ==================================================================
    2.dqs window
    x=pass dqs delay value (min~max)center 
    y=0-7bit DQ of every group
    input delay:DQS0 =34 DQS1 = 34
    ==================================================================
    bit     DQS0     bit      DQS1
    0  (1~66)33  8  (1~60)30
    1  (1~64)32  9  (1~68)34
    2  (1~66)33  10  (1~66)33
    3  (1~62)31  11  (1~62)31
    4  (1~64)32  12  (1~66)33
    5  (1~66)33  13  (0~63)31
    6  (1~65)33  14  (1~66)33
    7  (1~67)34  15  (1~66)33
    ==================================================================
    3.dq delay value last
    ==================================================================
    bit|    0  1  2  3  4  5  6  7  8   9
    --------------------------------------
    0 |    10 7 8 11 8 7 7 5 5 7 
    10 |    7 12 8 11 7 10 
    ==================================================================
    ==================================================================
         TX  perbyte calibration 
    ==================================================================
    DQS loop = 15, cmp_err_1 = ffff0000 
    dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
    DQ loop=15, cmp_err_1 = ffff0000
    dqs_perbyte_dly.last_dqdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=2 
    byte:0, (DQS,DQ)=(8,8)
    byte:1, (DQS,DQ)=(8,8)
    DRAMC_DQODLY1[200]=88888888
    DRAMC_DQODLY2[204]=88888888
    20,data:88
    [EMI] DRAMC calibration passed
    
    ===================================================================
                    MT7621   stage1 code done 
                    CPU=500000000 HZ BUS=125000000 HZ
    ===================================================================
    
    
    U-Boot 1.1.3 (May 25 2016 - 17:17:58)
    
    Board: Ralink APSoC DRAM:  128 MB
    relocate_code Pointer at: 87fb4000
    
    Config XHCI 40M PLL 
    flash manufacture id: c2, device id 20 18
    find flash: MX25L12805D
    ============================================ 
    Ralink UBoot Version: 4.0.1.0
    ELX UBoot Version: 1.0.3
    -------------------------------------------- 
    ASIC 7621_MP (MAC to MT7530 Mode)
    DRAM_CONF_FROM: Auto-Detection 
    DRAM_TYPE: DDR3 
    DRAM bus: 16 bit
    Xtal Mode=3 OCP Ratio=1/4
    Flash component: SPI Flash
    Date:May 25 2016  Time:17:17:58
    ============================================ 
    icache: sets:256, ways:4, linesz:32 ,total:32768
    dcache: sets:256, ways:4, linesz:32 ,total:32768 
    
     ##### The CPU freq = 880 MHZ #### 
     estimate memory size =128 Mbytes
    #Reset_MT7530
    
    Please choose the operation: 
       1: Load system code to SDRAM via TFTP. 
       2: Load system code then write to Flash via TFTP. 
       3: Boot system code via Flash (default).
       4: Entr boot command line interface.
       9: Load Boot Loader code then write to Flash via TFTP. 
                                                                                                                              0  
       
    3: System Boot system code via Flash.
    ## Booting image at bfc50000 ...
       Image Name:   Linux Kernel Image
       Image Type:   MIPS Linux Kernel Image (lzma compressed)
       Data Size:    1879274 Bytes =  1.8 MB
       Load Address: 80001000
       Entry Point:  803123e0
       Verifying Checksum ... OK
       Uncompressing Kernel Image ... OK
    No initrd
    ## Transferring control to Linux (at address 803123e0) ...
    ## Giving linux memsize in MB, 128
    
    Starting kernel ...
    
    Linux version 3.2.9 (root@***-pc) (gcc version 4.6.4 (Buildroot 2013.05) ) #3 SMP Tue Oct 31 18:12:39 CST 2017
    GCMP present
    bootconsole [early0] enabled
    CPU revision is: 0001992f (MIPS 1004Kc)
    Mediatek MT7621 ver:1 eco:3 running at 880.00 MHz
    Software DMA cache coherency
    Determined physical RAM map:
     memory: 08000000 @ 00000000 (usable)
    Initrd not found or empty - disabling initrd
    Zone PFN ranges:
      Normal   0x00000000 -> 0x00008000
    Movable zone start PFN for each node
    early_node_map[1] active PFN ranges
        0: 0x00000000 -> 0x00008000
    Detected 3 available secondary CPU(s)
    PERCPU: Embedded 7 pages/cpu @81103000 s4800 r8192 d15680 u32768
    Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32512
    Kernel command line:  console=ttyS0,57600 root=/dev/ram0 rootfstype=squashfs,jffs2
    PID hash table entries: 512 (order: -1, 2048 bytes)
    Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
    Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
    Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes.
    Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    Writing ErrCtl register=00048800
    Readback ErrCtl register=00048800
    Memory: 123988k/131072k available (3186k kernel code, 7084k reserved, 729k data, 1788k init, 0k highmem)
    SLUB: Genslabs=9, HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
    Hierarchical RCU implementation.
    NR_IRQS:128
    gic: revision 3.0
    CPU0: status register was 11000000
    CPU0: status register now 11001800
    CPU0: status register frc 1100dc00
    console [ttyS0] enabled, bootconsole disabled
    console [ttyS0] enabled, bootconsole disabled
    Calibrating delay loop... 574.46 BogoMIPS (lpj=1148928)
    pid_max: default: 32768 minimum: 301
    Mount-cache hash table entries: 512
    CPU revision is: 0001992f (MIPS 1004Kc)
    Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes.
    Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    CPU revision is: 0001992f (MIPS 1004Kc)
    Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes.
    Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    CPU revision is: 0001992f (MIPS 1004Kc)
    Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes.
    Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    Brought up 4 CPUs
    Synchronize counters across 4 CPUs: done.
    NET: Registered protocol family 16
    MIPS: machine is Ralink MT7621
    before gpio setting:407ac
    after gpio setting:405ac
    release PCIe RST: RALINK_RSTCTRL = 3000000
    PCIE PHY initialize
    ***** Xtal 40MHz *****
    start MT7621 PCIe register access
    RALINK_RSTCTRL = 3000000
    RALINK_CLKCFG1 = 77ffeff8
    
    *************** MT7621 PCIe RC mode *************
    pcie_link status = 0x3
    RALINK_RSTCTRL= 3000000
    *** Configure Device number setting of Virtual PCI-PCI bridge ***
    RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
    PCIE0 enabled
    PCIE1 enabled
    interrupt enable status: 300000
    Port 1 N_FTS = 1b105000
    Port 0 N_FTS = 1b105000
    config reg done
    init_rt2880pci done
    bio: create slab  at 0
    SCSI subsystem initialized
    pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
    pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
    pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
    pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
    pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
    pci 0000:00:00.0: BAR 1: set to [mem 0x60200000-0x6020ffff] (PCI address [0x60200000-0x6020ffff])
    pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
    pci 0000:00:01.0: BAR 1: set to [mem 0x60210000-0x6021ffff] (PCI address [0x60210000-0x6021ffff])
    pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
    pci 0000:01:00.0: BAR 0: set to [mem 0x60000000-0x600fffff 64bit] (PCI address [0x60000000-0x600fffff])
    pci 0000:00:00.0: PCI bridge to [bus 01-01]
    pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
    pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
    pci 0000:02:00.0: BAR 0: set to [mem 0x60100000-0x601fffff 64bit] (PCI address [0x60100000-0x601fffff])
    pci 0000:00:01.0: PCI bridge to [bus 02-02]
    pci 0000:00:01.0:   bridge window [mem 0x60100000-0x601fffff]
    PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
    PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
    BAR0 at slot 0 = 0
    bus=0x0, slot = 0x0
    res[0]->start = 0
    res[0]->end = 0
    res[1]->start = 60200000
    res[1]->end = 6020ffff
    res[2]->start = 0
    res[2]->end = 0
    res[3]->start = 0
    res[3]->end = 0
    res[4]->start = 0
    res[4]->end = 0
    res[5]->start = 0
    res[5]->end = 0
    BAR0 at slot 1 = 0
    bus=0x0, slot = 0x1
    res[0]->start = 0
    res[0]->end = 0
    res[1]->start = 60210000
    res[1]->end = 6021ffff
    res[2]->start = 0
    res[2]->end = 0
    res[3]->start = 0
    res[3]->end = 0
    res[4]->start = 0
    res[4]->end = 0
    res[5]->start = 0
    res[5]->end = 0
    bus=0x1, slot = 0x0, irq=0x4
    res[0]->start = 60000000
    res[0]->end = 600fffff
    res[1]->start = 0
    res[1]->end = 0
    res[2]->start = 0
    res[2]->end = 0
    res[3]->start = 0
    res[3]->end = 0
    res[4]->start = 0
    res[4]->end = 0
    res[5]->start = 0
    res[5]->end = 0
    bus=0x2, slot = 0x1, irq=0x18
    res[0]->start = 60100000
    res[0]->end = 601fffff
    res[1]->start = 0
    res[1]->end = 0
    res[2]->start = 0
    res[2]->end = 0
    res[3]->start = 0
    res[3]->end = 0
    res[4]->start = 0
    res[4]->end = 0
    res[5]->start = 0
    res[5]->end = 0
    Switching to clocksource MIPS
    NET: Registered protocol family 2
    IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
    TCP established hash table entries: 4096 (order: 3, 32768 bytes)
    TCP bind hash table entries: 4096 (order: 3, 32768 bytes)
    TCP: Hash tables configured (established 4096 bind 4096)
    TCP reno registered
    UDP hash table entries: 128 (order: 0, 4096 bytes)
    UDP-Lite hash table entries: 128 (order: 0, 4096 bytes)
    NET: Registered protocol family 1
    4 CPUs re-calibrate udelay(lpj = 1167360)
    Load Ralink Timer0 Module
    Load Ralink Timer1 Module
    Load Ralink Timer2 Module
    squashfs: version 4.0 (2009/01/31) Phillip Lougher
    JFFS2 version 2.2 (NAND) (SUMMARY) (ZLIB) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
    msgmni has been set to 242
    io scheduler noop registered
    io scheduler deadline registered
    io scheduler cfq registered (default)
    Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
    serial8250: ttyS0 at MMIO 0x1e000c00 (irq = 26) is a 16550A
    serial8250: ttyS1 at MMIO 0x1e000e00 (irq = 28) is a 16550A
    loop: module loaded
    flash manufacture id: c2, device id 20 18
    MX25L12805D(c2 2018c220) (16384 Kbytes)
    mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
    Creating 8 MTD partitions on "raspi":
    0x000000000000-0x000001000000 : "ALL"
    0x000000000000-0x000000030000 : "Bootloader"
    0x000000030000-0x000000040000 : "Config"
    0x000000040000-0x000000050000 : "Factory"
    0x000000050000-0x000000df0000 : "Kernel"
    0x000000220000-0x000000df0000 : "user"
    0x000000df0000-0x000000f80000 : "manufacture"
    0x000000f80000-0x000001000000 : "storage"
    rdm_major = 253
    IMQ driver loaded successfully. (numdevs = 2, numqueues = 1)
            Hooking IMQ after NAT on PREROUTING.
            Hooking IMQ before NAT on POSTROUTING.
    GMAC1_MAC_ADRH -- : 0x0000000c
    GMAC1_MAC_ADRL -- : 0x43288002
    Ralink APSoC Ethernet Driver Initilization. v3.1  512 rx/tx descriptors allocated, mtu = 1500!
    GMAC1_MAC_ADRH -- : 0x0000000c
    GMAC1_MAC_ADRL -- : 0x432880c9
    PROC INIT OK!
    PPP generic driver version 2.4.2
    PPP BSD Compression module registered
    PPP Deflate Compression module registered
    PPP MPPE Compression module registered
    NET: Registered protocol family 24
    Registered button device:reset, gpio:16,code:408,index:10
    Registered button device:wps, gpio:18,code:529,index:11
    Registered button device:op_mode_1, gpio:13,code:263,index:7
    GACT probability on
    Mirror/redirect action on
    Simple TC action Loaded
    netem: version 1.3
    u32 classifier
        Performance counters on
        input device check on
        Actions configured
    Netfilter messages via NETLINK v0.30.
    nf_conntrack version 0.5.0 (2500 buckets, 17500 max, 2500 max0, 20000 reserved)
    xt_time: kernel timezone is -0000
    ip_tables: (C) 2000-2006 Netfilter Core Team
    TCP westwood registered
    NET: Registered protocol family 10
    ip6_tables: (C) 2000-2006 Netfilter Core Team
    IPv6 over IPv4 tunneling driver
    NET: Registered protocol family 17
    NET: Registered protocol family 2
    L2TP core driver, V2.0
    8021q: 802.1Q VLAN Support v1.8
    Freeing unused kernel memory: 1788k freed
    System Init version: 1.1 date: 1
    Setting up file systems ...
    Setting up /mnt/tmpfs directory with tmpfs/16384KB
    Setting up FLASH storage partition ...
    JFFS2 notice: (345) jffs2_build_xattr_subsystem: complete building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of xref (0 dead, 0 orphan) found.
    Setting up /apps directory ...apps is in FLASH ...
    Setting up loopback device ...
    FINISHED
    Start Normal Operation Mode ...
    ************************************************************************
    *                                ---ELX---                             *
    ************************************************************************
    
    KernelApp version: 1.4.0 build date: 2017/10/31 build time: 18:06:42
    cmd> ln: /sbin/./start_all: File exists
    Share memory created:  keyid 6888 shm_id 0 size 208(KB)
    Warning: dbox_destroy_share_memory p_dbox_cfg is NULL!
    nat_session_manager: module license 'unspecified' taints kernel.
    Disabling lock debugging due to kernel taint
    Start nat_session_reservation_init_driver
    __create_share_mem keyid 6888 shm_id 0
     0:1F: 0: 0: 0: 0
    Raeth v3.1 (Tasklet)
    phy_free_head is 0x6c00000!!!
    phy_free_tail_phy is 0x6c01ff0!!!
    txd_pool=a6c1a000 phy_txd_pool=06C1A000
    ei_local->skb_free start address is 0x8703d45c.
    free_txd: 06c1a010, ei_local->cpu_ptr: 06C1A000
     POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    ----------------+---------+--------
         0xa6c1a000 0x06C1A000 0x06C1A000
    
    phy_qrx_ring = 0x06c02000, qrx_ring = 0xa6c02000
    
    phy_rx_ring0 = 0x073ea000, rx_ring0 = 0xa73ea000
    GMAC1_MAC_ADRH -- : 0x0000001f
    GMAC1_MAC_ADRL -- : 0x00000000
    GDMA2_MAC_ADRH -- : 0x000000aa
    GDMA2_MAC_ADRL -- : 0xbbccdd20
    eth3: ===> VirtualIF_open
    CDMA_CSG_CFG = 81000000
    GDMA1_FWD_CFG = 20710000
    GDMA2_FWD_CFG = 20710000
    ra2880stop()...Done
    eth3: ===> VirtualIF_close
    Free TX/RX Ring Memory!
     0:1F: 0: 0: 0: 0
    Raeth v3.1 (Tasklet)
    phy_free_head is 0x6c24000!!!
    phy_free_tail_phy is 0x6c25ff0!!!
    txd_pool=a733c000 phy_txd_pool=0733C000
    ei_local->skb_free start address is 0x8703d45c.
    free_txd: 0733c010, ei_local->cpu_ptr: 0733C000
     POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    ----------------+---------+--------
         0xa733c000 0x0733C000 0x0733C000
    
    phy_qrx_ring = 0x07359000, qrx_ring = 0xa7359000
    
    phy_rx_ring0 = 0x073f2000, rx_ring0 = 0xa73f2000
    GMAC1_MAC_ADRH -- : 0x0000001f
    GMAC1_MAC_ADRL -- : 0x00000000
    eth3: ===> VirtualIF_open
    CDMA_CSG_CFG = 81000000
    GDMA1_FWD_CFG = 20710000
    GDMA2_FWD_CFG = 20710000
    GDMA2_MAC_ADRH -- : 0x00003476
    GDMA2_MAC_ADRL -- : 0xc583ba1d
    eth3: ===> VirtualIF_open
    ADDRCONF(NETDEV_UP): br0: link is not ready
    device eth2 entered promiscuous mode
    br0: port 1(eth2) entering forwarding state
    br0: port 1(eth2) entering forwarding state
    
    
    ********************
    Initialize Radio_(24G) setting ... 
    rd[0]==1
    OK
    
    
    Configuring Ralink WiFi device ...Wlan is in
     AP Mode
    CMD[insmod /lib/rlt_wifi.ko]
    register mt_drv
    
    
    === pAd = c0601000, size = 2378520 ===
    
    PciHif.CSRBaseAddress =0xc0500000, csr_addr=0xc0500000!
    RTMPInitPCIeDevice():device_id=0x7615
    DriverOwn()::Try to Clear FW Own...
    DriverOwn()::Success to clear FW Own
    mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
    mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
    RtmpChipOpsHook(492): Not support for HIF_MT yet! MACVersion=0x0
    mt7615_init()-->
    Use 1st ePAeLNA default bin.
    
    Use 2nd ePAeLNA default bin.
    rxq = c0843d84
    ctl->ackq = c0843d90
    ctl->kickq = c0843d9c
    ctl->tx_doneq = c0843da8
    ctl->rx_doneq = c0843db4
    mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
    mt7615_fw_prepare(2356): MT7615_E3, USE E3 patch and ram code binary image
    AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(3150)
    AndesRestartCheck: Current TOP_MISC2(0x1)
    AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    20160419154809a
    
    platform = 
    ALPS
    hw/sw version = 
    8a108a10
    patch version = 
    00000010
    Patch SEM Status=2
    MtCmdPatchSemGet:(ret = 0)
    
    Patch is not ready && get semaphore success, SemStatus(2)
    EventGenericEventHandler: CMD Success
    MtCmdAddressLenReq:(ret = 0)
    MtCmdPatchFinishReq
    EventGenericEventHandler: CMD Success
    Send checksum req..
    Patch SEM Status=3
    MtCmdPatchSemGet:(ret = 0)
    
    Release patch semaphore, SemStatus(3)
    AndesMTEraseRomPatch
    AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(452248)
    Build Date:_201609021732
    Build Date:_201609021732
    AndesRestartCheck: Current TOP_MISC2(0x1)
    AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    EventGenericEventHandler: CMD Success
    MtCmdAddressLenReq:(ret = 0)
    EventGenericEventHandler: CMD Success
    MtCmdAddressLenReq:(ret = 0)
    MtCmdFwStartReq: override = 1, address = 540672
    EventGenericEventHandler: CMD Success
    Build Date:_201607011611
    EventGenericEventHandler: CMD Success
    MtCmdAddressLenReq:(ret = 0)
    MtCmdFwStartReq: override = 4, address = 0
    EventGenericEventHandler: CMD Success
    MCU Init Done!
    efuse_probe: efuse = 10000212
    RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
    RtmpEepromGetDefault::e2p_dafault=1
    RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
    NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x40000]
    NICReadEEPROMParameters: EEPROM 0x52 b307
    MtCmdSetTxLpfCal:(ret = 0)
    MtCmdSetTxIqCal:(ret = 0)
    MtCmdSetTxDcCal:(ret = 0)
    MtCmdSetRxFiCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    Country Region from e2p = 1
    mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
    rtmp_read_txpwr_from_eeprom(224): Don't Support this now!
    RTMPReadTxPwrPerRate(1381): Don't Support this now!
    RcRadioInit(): DbdcMode=0, ConcurrentBand=1
    RcRadioInit(): pRadioCtrl=878e9438,Band=0,rfcap=3,channel=1,PhyMode=2
    MtCmdSetDbdcCtrl:(ret = 0)
    Band Rf: 1, Phy Mode: 2
    AntCfgInit(2618): Not support for HIF_MT yet!
    MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
    MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
    EEPROM Init Done!
    mt_mac_init()-->
    mt_mac_pse_init(2715): Don't Support this now!
    mt7615_init_mac_cr()-->
    mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
    mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
    MtAsicSetMacMaxLen(1288): Not finish Yet!
    
    ApAutoChannelAtBootUprxq = c0bc3d84
    ctl->ackq = c0bc3d90
    ctl->kickq = c0bc3d9c
    ctl->tx_doneq = c0bc3da8
    ctl->rx_doneq = c0bc3db4
    mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
    mt7615_fw_prepare(2356): MT7615_E3, USE E3 patch and ram code binary image
    AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(3150)
    AndesRestartCheck: Current TOP_MISC2(0x1)
    AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    20160419154809a
    
    platform = 
    ALPS
    hw/sw version = 
    8a108a10
    patch version = 
    00000010
    Patch SEM Status=2
    MtCmdPatchSemGet:(ret = 0)
    
    Patch is not ready && get semaphore success, SemStatus(2)
    EventGenericEventHandler: CMD Success
    MtCmdAddressLenReq:(ret = 0)
    MtCmdPatchFinishReq
    EventGenericEventHandler: CMD Success
    Send checksum req..
    Patch SEM Status=3
    MtCmdPatchSemGet:(ret = 0)
    
    Release patch semaphore, SemStatus(3)
    AndesMTEraseRomPatch
    AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(452248)
    Build Date:_201609021732
    Build Date:_201609021732
    AndesRestartCheck: Current TOP_MISC2(0x1)
    AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    EventGenericEventHandler: CMD Success
    MtCmdAddressLenReq:(ret = 0)
    EventGenericEventHandler: CMD Success
    MtCmdAddressLenReq:(ret = 0)
    MtCmdFwStartReq: override = 1, address = 540672
    EventGenericEventHandler: CMD Success
    Build Date:_201607011611
    EventGenericEventHandler: CMD Success
    MtCmdAddressLenReq:(ret = 0)
    MtCmdFwStartReq: override = 4, address = 0
    EventGenericEventHandler: CMD Success
    MCU Init Done!
    efuse_probe: efuse = 10000212
    RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
    RtmpEepromGetDefault::e2p_dafault=1
    RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
    NVM is FLASH mode. dev_idx [1] FLASH OFFSET [0x48000]
    NICReadEEPROMParameters: EEPROM 0x52 b307
    MtCmdSetTxLpfCal:(ret = 0)
    MtCmdSetTxIqCal:(ret = 0)
    MtCmdSetTxDcCal:(ret = 0)
    MtCmdSetRxFiCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    MtCmdSetRxFdCal:(ret = 0)
    Country Region from e2p = 1
    mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
    rtmp_read_txpwr_from_eeprom(224): Don't Support this now!
    RTMPReadTxPwrPerRate(1381): Don't Support this now!
    RcRadioInit(): DbdcMode=0, ConcurrentBand=1
    RcRadioInit(): pRadioCtrl=878eb438,Band=0,rfcap=3,channel=1,PhyMode=2
    MtCmdSetDbdcCtrl:(ret = 0)
    Band Rf: 1, Phy Mode: 2
    AntCfgInit(2618): Not support for HIF_MT yet!
    MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
    MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
    EEPROM Init Done!
    mt_mac_init()-->
    mt_mac_pse_init(2715): Don't Support this now!
    mt7615_init_mac_cr()-->
    mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
    mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
    MtAsicSetMacMaxLen(1288): Not finish Yet!
    
    ApAutoChannelAtBootUp VirtualIF_open
    Ebtables v2.0 registered
    __create_share_mem keyid 6888 shm_id 0
    __create_share_mem keyid 6888 shm_id 0
    __create_share_mem keyid 6888 shm_id 0
    Start wps_led driver
    Err: read_to_buf failed to open file /proc/523/status!
    br0: port 1(eth2) entering forwarding state
    eth3: ===> VirtualIF_close
    eth3: ===> VirtualIF_open
    eth3: ===> VirtualIF_close
    eth3: ===> VirtualIF_open
    br0: port 2(ra0) entering forwarding state
    br0: port 3(rai0) entering forwarding state
    
    

広告

WRC-2533GST

何かあるかなーと訪れたハードオフ花小金井店で、WRC-1750GS辺りかなと思った¥5,000のルータがWRC-2533GSTだったので、衝動的に購入。弄るにあたってメモ。

Switch

zone WAN LAN
port
(WRC-2533GST)
INTERNET LAN4 LAN3 LAN2 LAN1
port
(MT7530)
port0 port1 port2 port3 port4

MAC

  • LAN: xx:xx:xx:xx:xx:23
  • WAN: xx:xx:xx:xx:xx:24
  • 2.4G: xx:xx:xx:xx:xx:25
  • 5G: xx:xx:xx:xx:xx:26

U-Boot

  • help
    MT7621 # help
    ?       - alias for 'help'
    bootm   - boot application image from memory
    cp      - memory copy
    erase   - erase SPI FLASH memory
    go      - start application at address 'addr'
    help    - print online help
    httpboot- entering the backup mode.
    loadb   - load binary file over serial line (kermit mode)
    md      - memory display
    mdio   - Ralink PHY register R/W command !!
    mm      - memory modify (auto-incrementing)
    nm      - memory modify (constant address)
    printenv- print environment variables
    reset   - Perform RESET of the CPU
    rf      - read/write rf register
    saveenv - save environment variables to persistent storage
    setenv  - set environment variables
    spi     - spi command
    tftpboot- boot image via network using TFTP protocol
    version - print monitor version
    

  • version
    MT7621 # version
    
    U-Boot 1.1.3 (Aug 11 2017 - 22:15:36)
    

  • printenv
    MT7621 # printenv
    bootcmd=tftp
    bootdelay=5
    baudrate=57600
    ethaddr="00:AA:BB:CC:DD:10"
    ipaddr=192.168.2.1
    serverip=192.168.2.2
    model_id=WRC-2533GST
    board_id=201791707070
    wlan0_guest_ssid=e-tomo-aa9323
    wlan0_guest_key=********
    wlan0_ssid=elecom2g-aa9323
    wlan1_ssid=elecom5g-aa9323
    wlan0_key=************
    wlan1_key=************
    wps_pin=********
    hw_version=A1
    wlan0_domain=0x41
    stdin=serial
    stdout=serial
    stderr=serial
    ethact=Eth0 (10/100-M)
    
    Environment size: 420/4092 bytes
    

Kernel

  • uname -a
    root@WRC-2533GST:/# uname -a
    Linux WRC-2533GST 3.10.14+ #1 SMP Tue Dec 26 17:12:40 CST 2017 mips GNU/Linux

  • cat /proc/version
    root@WRC-2533GST:/# cat /proc/version
    Linux version 3.10.14+ (*****@ubuntu) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #1 SMP Tue Dec 26 17:12:40 CST 2017
    

  • cat /proc/cpuinfo
    root@WRC-2533GST:/# cat /proc/cpuinfo
    system type             : MT7621
    machine                 : Unknown
    processor               : 0
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 1
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 2
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 3
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    

  • cat /proc/meminfo
    root@WRC-1167GHBK2-S:/# cat /proc/meminfo 
    root@WRC-2533GST:/# cat /proc/meminfo
    MemTotal:         124024 kB
    MemFree:           69872 kB
    Buffers:            3928 kB
    Cached:            11476 kB
    SwapCached:            0 kB
    Active:             6304 kB
    Inactive:          11180 kB
    Active(anon):       2124 kB
    Inactive(anon):      156 kB
    Active(file):       4180 kB
    Inactive(file):    11024 kB
    Unevictable:           0 kB
    Mlocked:               0 kB
    SwapTotal:             0 kB
    SwapFree:              0 kB
    Dirty:                 0 kB
    Writeback:             0 kB
    AnonPages:          2108 kB
    Mapped:             1300 kB
    Shmem:               200 kB
    Slab:              17668 kB
    SReclaimable:       1864 kB
    SUnreclaim:        15804 kB
    KernelStack:         616 kB
    PageTables:          348 kB
    NFS_Unstable:          0 kB
    Bounce:                0 kB
    WritebackTmp:          0 kB
    CommitLimit:       62012 kB
    Committed_AS:       6700 kB
    VmallocTotal:    1048372 kB
    VmallocUsed:       16068 kB
    VmallocChunk:    1018556 kB
    

  • cat /proc/mtd
    root@WRC-2533GST:/# cat /proc/mtd
    dev:    size   erasesize  name
    mtd0: 01000000 00010000 "ALL"
    mtd1: 00030000 00010000 "Bootloader"
    mtd2: 00010000 00010000 "Config"
    mtd3: 00010000 00010000 "Factory"
    mtd4: 00b00000 00010000 "firmware"
    mtd5: 00200000 00010000 "kernel"
    mtd6: 00900000 00010000 "rootfs"
    mtd7: 00380000 00010000 "tm_pattern"
    mtd8: 00080000 00010000 "tm_key"
    mtd9: 00030000 00010000 "art_block"
    mtd10: 00080000 00010000 "rootfs_data"
    

  • bootlog
    ===================================================================
                    MT7621   stage1 code 10:33:55 (ASIC)
                    CPU=500000000 HZ BUS=166666666 HZ
    ==================================================================
    Change MPLL source from XTAL to CR...
    do MEMPLL setting..
    MEMPLL Config : 0x11000000
    3PLL mode + External loopback
    === XTAL-40Mhz === DDR-1200Mhz ===
    PLL4 FB_DL: 0x10, 1/0 = 722/302 41000000
    PLL3 FB_DL: 0x12, 1/0 = 775/249 49000000
    PLL2 FB_DL: 0x1a, 1/0 = 555/469 69000000
    do DDR setting..[01F40000]
    Apply DDR3 Setting...(use default AC)
              0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
          --------------------------------------------------------------------------------
    0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    1    1
    000E:|    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1
    000F:|    0    0    0    0    1    1    1    1    1    1    1    1    1    1    0    0
    0010:|    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0
    0011:|    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0
    0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    rank 0 coarse = 15
    rank 0 fine = 72
    B:|    0    0    0    0    0    0    0    0    0    0    1    1    1    0    0    0
    opt_dle value:11
    DRAMC_R0DELDLY[018]=00001E1E
    ==================================================================
                    RX      DQS perbit delay software calibration 
    ==================================================================
    1.0-15 bit dq delay value
    ==================================================================
    bit|     0  1  2  3  4  5  6  7  8  9
    --------------------------------------
    0 |    12 10 10 12 7 9 9 8 8 9 
    10 |    10 11 9 12 10 10 
    --------------------------------------
    
    ==================================================================
    2.dqs window
    x=pass dqs delay value (min~max)center 
    y=0-7bit DQ of every group
    input delay:DQS0 =30 DQS1 = 30
    ==================================================================
    bit     DQS0     bit      DQS1
    0  (1~58)29  8  (1~55)28
    1  (1~57)29  9  (1~56)28
    2  (1~56)28  10  (1~59)30
    3  (1~59)30  11  (1~58)29
    4  (1~56)28  12  (1~57)29
    5  (1~58)29  13  (1~56)28
    6  (1~55)28  14  (1~59)30
    7  (1~58)29  15  (1~58)29
    ==================================================================
    3.dq delay value last
    ==================================================================
    bit|    0  1  2  3  4  5  6  7  8   9
    --------------------------------------
    0 |    13 11 12 12 9 10 11 9 10 11 
    10 |    10 12 10 14 10 11 
    ==================================================================
    ==================================================================
         TX  perbyte calibration 
    ==================================================================
    DQS loop = 15, cmp_err_1 = ffff0000 
    dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
    DQ loop=15, cmp_err_1 = ffff0000
    dqs_perbyte_dly.last_dqdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=2 
    byte:0, (DQS,DQ)=(8,8)
    byte:1, (DQS,DQ)=(8,8)
    20,data:88
    [EMI] DRAMC calibration passed
    
    ===================================================================
                    MT7621   stage1 code done 
                    CPU=500000000 HZ BUS=166666666 HZ
    ===================================================================
    
    
    U-Boot 1.1.3 (Aug 11 2017 - 22:15:36)
    
    Board: Ralink APSoC DRAM:  128 MB
    relocate_code Pointer at: 87fb4000
    
    Config XHCI 40M PLL 
    ******************************
    Software System Reset Occurred
    ******************************
    flash manufacture id: c2, device id 20 18
    find flash: MX25L12805D
    ============================================ 
    Ralink UBoot Version: 5.0.0.0
    -------------------------------------------- 
    ASIC MT7621A DualCore (MAC to MT7530 Mode)
    DRAM_CONF_FROM: Auto-Detection 
    DRAM_TYPE: DDR3 
    DRAM bus: 16 bit
    Xtal Mode=3 OCP Ratio=1/3
    Flash component: SPI Flash
    Date:Aug 11 2017  Time:22:15:36
    ============================================ 
    icache: sets:256, ways:4, linesz:32 ,total:32768
    dcache: sets:256, ways:4, linesz:32 ,total:32768 
    
     ##### The CPU freq = 880 MHZ #### 
     estimate memory size =128 Mbytes
    #Reset_MT7530
    set LAN/WAN WLLLL
    
    Please choose the operation: 
       1: Load system code to SDRAM via TFTP. 
       2: Load system code then write to Flash via TFTP. 
       3: Boot system code via Flash (default).
       4: Entr boot command line interface.
       7: Load Boot Loader code then write to Flash via Serial. 
       9: Load Boot Loader code then write to Flash via TFTP. 
    
    You choosed 3
    
                                                                                                                               0 
       
    3: System Boot system code via Flash.
    ## Booting image at bc050000 ...
       Image Name:   MIPS OpenWrt Linux-3.10
       Image Type:   MIPS Linux Kernel Image (lzma compressed)
       Data Size:    9306048 Bytes =  8.9 MB
       Load Address: 81001000
       Entry Point:  8143aab0
       Verifying Checksum ... OK
       Uncompressing Kernel Image ... OK
    No initrd
    ## Transferring control to Linux (at address 8143aab0) ...
    ## Giving linux memsize in MB, 128
    
    Starting kernel ...
    
    
    LINUX started...
    
     THIS IS ASIC
    
    SDK 5.0.S.0
    [    0.000000] Linux version 3.10.14+ (eason@ubuntu) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #1 SMP Tue Dec 26 17:12:40 CST 2017
    [    0.000000] 
    [    0.000000]  The CPU feqenuce set to 880 MHz
    [    0.000000] GCMP present
    [    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
    [    0.000000] Software DMA cache coherency
    [    0.000000] Determined physical RAM map:
    [    0.000000]  memory: 08000000 @ 00000000 (usable)
    [    0.000000] Initrd not found or empty - disabling initrd
    [    0.000000] Zone ranges:
    [    0.000000]   DMA      [mem 0x00000000-0x00ffffff]
    [    0.000000]   Normal   [mem 0x01000000-0x07ffffff]
    [    0.000000] Movable zone start for each node
    [    0.000000] Early memory node ranges
    [    0.000000]   node   0: [mem 0x00000000-0x07ffffff]
    [    0.000000] Detected 3 available secondary CPU(s)
    [    0.000000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.000000] PERCPU: Embedded 7 pages/cpu @816e7000 s6592 r8192 d13888 u32768
    [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32512
    [    0.000000] Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock6 init=/etc/preinit
    [    0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
    [    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
    [    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
    [    0.000000] Writing ErrCtl register=00014700
    [    0.000000] Readback ErrCtl register=00014700
    [    0.000000] Memory: 123780k/131072k available (4367k kernel code, 7292k reserved, 1205k data, 244k init, 0k highmem)
    [    0.000000] Hierarchical RCU implementation.
    [    0.000000] NR_IRQS:128
    [    0.000000] console [ttyS1] enabled
    [    0.120000] Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
    [    0.160000] pid_max: default: 32768 minimum: 301
    [    0.164000] Mount-cache hash table entries: 512
    [    0.168000] launch: starting cpu1
    [    0.172000] launch: cpu1 gone!
    [    0.172000] CPU1 revision is: 0001992f (MIPS 1004Kc)
    [    0.172000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.172000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.172000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.204000] Synchronize counters for CPU 1: done.
    [    0.212000] launch: starting cpu2
    [    0.216000] launch: cpu2 gone!
    [    0.216000] CPU2 revision is: 0001992f (MIPS 1004Kc)
    [    0.216000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.216000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.216000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.248000] Synchronize counters for CPU 2: done.
    [    0.256000] launch: starting cpu3
    [    0.260000] launch: cpu3 gone!
    [    0.260000] CPU3 revision is: 0001992f (MIPS 1004Kc)
    [    0.260000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.260000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.260000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.288000] Synchronize counters for CPU 3: done.
    [    0.296000] Brought up 4 CPUs
    [    0.300000] devtmpfs: initialized
    [    0.304000] NET: Registered protocol family 16
    [    0.604000] release PCIe RST: RALINK_RSTCTRL = 7000000
    [    0.608000] PCIE PHY initialize
    [    0.612000] ***** Xtal 40MHz *****
    [    0.616000] start MT7621 PCIe register access
    [    1.208000] RALINK_RSTCTRL = 7000000
    [    1.212000] RALINK_CLKCFG1 = 77ffeff8
    [    1.216000] 
    [    1.216000] *************** MT7621 PCIe RC mode *************
    [    1.712000] PCIE2 no card, disable it(RST&CLK)
    [    1.716000] pcie_link status = 0x3
    [    1.720000] RALINK_RSTCTRL= 3000000
    [    1.724000] *** Configure Device number setting of Virtual PCI-PCI bridge ***
    [    1.728000] RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
    [    1.732000] PCIE0 enabled
    [    1.736000] PCIE1 enabled
    [    1.740000] interrupt enable status: 300000
    [    1.744000] Port 1 N_FTS = 1b105000
    [    1.748000] Port 0 N_FTS = 1b105000
    [    1.752000] config reg done
    [    1.756000] init_rt2880pci done
    [    1.772000] bio: create slab  at 0
    [    1.776000] vgaarb: loaded
    [    1.780000] SCSI subsystem initialized
    [    1.784000] PCI host bridge to bus 0000:00
    [    1.788000] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
    [    1.792000] pci_bus 0000:00: root bus resource [io  0x1e160000-0x1e16ffff]
    [    1.796000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
    [    1.800000] pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
    [    1.804000] pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
    [    1.808000] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
    [    1.812000] pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
    [    1.816000] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
    [    1.820000] pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
    [    1.824000] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
    [    1.828000] pci 0000:00:00.0: PCI bridge to [bus 01]
    [    1.832000] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
    [    1.836000] pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
    [    1.840000] pci 0000:00:01.0: PCI bridge to [bus 02]
    [    1.844000] pci 0000:00:01.0:   bridge window [mem 0x60100000-0x601fffff]
    [    1.848000] BAR0 at slot 0 = 0
    [    1.852000] bus=0x0, slot = 0x0
    [    1.856000] res[0]->start = 0
    [    1.860000] res[0]->end = 0
    [    1.864000] res[1]->start = 60200000
    [    1.868000] res[1]->end = 6020ffff
    [    1.872000] res[2]->start = 0
    [    1.876000] res[2]->end = 0
    [    1.880000] res[3]->start = 0
    [    1.884000] res[3]->end = 0
    [    1.888000] res[4]->start = 0
    [    1.892000] res[4]->end = 0
    [    1.896000] res[5]->start = 0
    [    1.900000] res[5]->end = 0
    [    1.904000] BAR0 at slot 1 = 0
    [    1.908000] bus=0x0, slot = 0x1
    [    1.912000] res[0]->start = 0
    [    1.916000] res[0]->end = 0
    [    1.920000] res[1]->start = 60210000
    [    1.924000] res[1]->end = 6021ffff
    [    1.928000] res[2]->start = 0
    [    1.932000] res[2]->end = 0
    [    1.936000] res[3]->start = 0
    [    1.940000] res[3]->end = 0
    [    1.944000] res[4]->start = 0
    [    1.948000] res[4]->end = 0
    [    1.952000] res[5]->start = 0
    [    1.956000] res[5]->end = 0
    [    1.960000] bus=0x1, slot = 0x0, irq=0x4
    [    1.964000] res[0]->start = 60000000
    [    1.968000] res[0]->end = 600fffff
    [    1.972000] res[1]->start = 0
    [    1.976000] res[1]->end = 0
    [    1.980000] res[2]->start = 0
    [    1.984000] res[2]->end = 0
    [    1.988000] res[3]->start = 0
    [    1.992000] res[3]->end = 0
    [    1.996000] res[4]->start = 0
    [    2.000000] res[4]->end = 0
    [    2.004000] res[5]->start = 0
    [    2.008000] res[5]->end = 0
    [    2.012000] bus=0x2, slot = 0x1, irq=0x18
    [    2.016000] res[0]->start = 60100000
    [    2.020000] res[0]->end = 601fffff
    [    2.024000] res[1]->start = 0
    [    2.028000] res[1]->end = 0
    [    2.032000] res[2]->start = 0
    [    2.036000] res[2]->end = 0
    [    2.040000] res[3]->start = 0
    [    2.044000] res[3]->end = 0
    [    2.048000] res[4]->start = 0
    [    2.052000] res[4]->end = 0
    [    2.056000] res[5]->start = 0
    [    2.060000] res[5]->end = 0
    [    2.064000] Switching to clocksource MIPS
    [    2.068000] NET: Registered protocol family 2
    [    2.076000] TCP established hash table entries: 1024 (order: 1, 8192 bytes)
    [    2.092000] TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
    [    2.104000] TCP: Hash tables configured (established 1024 bind 1024)
    [    2.116000] TCP: reno registered
    [    2.124000] UDP hash table entries: 256 (order: 1, 8192 bytes)
    [    2.136000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
    [    2.148000] NET: Registered protocol family 1
    [    2.156000] RPC: Registered named UNIX socket transport module.
    [    2.168000] RPC: Registered udp transport module.
    [    2.176000] RPC: Registered tcp transport module.
    [    2.188000] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    2.288000] 4 CPUs re-calibrate udelay(lpj = 1167360)
    [    2.300000] squashfs: version 4.0 (2009/01/31) Phillip Lougher
    [    2.312000] jffs2: version 2.2. (NAND) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
    [    2.332000] fuse init (API version 7.22)
    [    2.340000] msgmni has been set to 241
    [    2.348000] io scheduler noop registered (default)
    [    2.360000] reg_int_mask=0, INT_MASK= 0 
    [    2.368000] HSDMA_init
    [    2.372000] 
    [    2.372000]  hsdma_phy_tx_ring0 = 0x00c00000, hsdma_tx_ring0 = 0xa0c00000
    [    2.388000] 
    [    2.388000]  hsdma_phy_rx_ring0 = 0x00c04000, hsdma_rx_ring0 = 0xa0c04000
    [    2.404000] TX_CTX_IDX0 = 0
    [    2.412000] TX_DTX_IDX0 = 0
    [    2.416000] RX_CRX_IDX0 = 3ff
    [    2.424000] RX_DRX_IDX0 = 0
    [    2.428000] set_fe_HSDMA_glo_cfg
    [    2.436000] HSDMA_GLO_CFG = 465
    [    2.444000] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
    [    2.456000] serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
    [    2.468000] serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
    [    2.484000] Ralink gpio driver initialized
    [    2.496000] brd: module loaded
    [    2.504000] flash manufacture id: c2, device id 20 18
    [    2.512000] MX25L12805D(c2 2018c220) (16384 Kbytes)
    [    2.524000] mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
    [    2.544000] Creating 11 MTD partitions on "raspi":
    [    2.552000] 0x000000000000-0x000001000000 : "ALL"
    [    2.564000] 0x000000000000-0x000000030000 : "Bootloader"
    [    2.572000] 0x000000030000-0x000000040000 : "Config"
    [    2.584000] 0x000000040000-0x000000050000 : "Factory"
    [    2.596000] 0x000000050000-0x000000b50000 : "firmware"
    [    2.604000] 0x000000050000-0x000000250000 : "kernel"
    [    2.616000] 0x000000250000-0x000000b50000 : "rootfs"
    [    2.628000] 0x000000b50000-0x000000ed0000 : "tm_pattern"
    [    2.636000] 0x000000ed0000-0x000000f50000 : "tm_key"
    [    2.648000] 0x000000f50000-0x000000f80000 : "art_block"
    [    2.660000] 0x000000f80000-0x000001000000 : "rootfs_data"
    [    2.672000] PPP generic driver version 2.4.2
    [    2.680000] PPP BSD Compression module registered
    [    2.688000] PPP MPPE Compression module registered
    [    2.700000] NET: Registered protocol family 24
    [    2.708000] PPTP driver version 0.8.5
    [    2.716000] rdm_major = 253
    [    2.720000] GMAC1_MAC_ADRH -- : 0x0000bc5c
    [    2.728000] GMAC1_MAC_ADRL -- : 0x4caa9323
    [    2.736000] Ralink APSoC Ethernet Driver Initilization. v3.1  1024 rx/tx descriptors allocated, mtu = 1500!
    [    2.756000] [LOG]|WIRE| LAN Starting
    [    2.764000] GMAC1_MAC_ADRH -- : 0x0000bc5c
    [    2.772000] GMAC1_MAC_ADRL -- : 0x4caa9323
    [    2.780000] PROC INIT OK!
    [    2.784000] nf_conntrack version 0.5.0 (1934 buckets, 7736 max)
    [    2.796000] xt_time: kernel timezone is -0000
    [    2.808000] gre: GRE over IPv4 demultiplexor driver
    [    2.816000] ip_tables: (C) 2000-2006 Netfilter Core Team
    [    2.828000] Type=Restricted Cone
    [    2.832000] TCP: cubic registered
    [    2.840000] NET: Registered protocol family 10
    [    2.848000] sit: IPv6 over IPv4 tunneling driver
    [    2.860000] NET: Registered protocol family 17
    [    2.868000] Bridge firewalling registered
    [    2.876000] Ebtables v2.0 registered
    [    2.884000] l2tp_core: L2TP core driver, V2.0
    [    2.892000] l2tp_ppp: PPPoL2TP kernel driver, V2.0
    [    2.900000] l2tp_netlink: L2TP netlink interface
    [    2.912000] 8021q: 802.1Q VLAN Support v1.8
    [    2.928000] VFS: Mounted root (squashfs filesystem) readonly on device 31:6.
    [    2.944000] devtmpfs: mounted
    [    2.952000] Freeing unused kernel memory: 244K (81573000 - 815b0000)
    - preinit -
    Press the [f] key and hit [enter] to enter failsafe mode
    - regular preinit -
    [    7.164000] jffs2: notice: (119) jffs2_build_xattr_subsystem: complete building xattr subsystem, 1 of xdatum (0 unchecked, 0 orphan) and 17 of xref (0 dead, 9 orphan) found.
    switching to jffs2
    - init -
    
    Please press Enter to activate this console. [   10.316000] ip_gre: GRE over IPv4 tunneling driver
    [   10.388000] bonding: Ethernet Channel Bonding Driver: v3.7.1 (April 27, 2011)
    [   10.704000] /proc/router_ip created
    [   10.844000] nf_nat_amanda: Unknown symbol nf_nat_amanda_hook (err 0)
    [   10.964000] Netfilter messages via NETLINK v0.30.
    [   11.140000] ip6_tables: (C) 2000-2006 Netfilter Core Team
    [   11.248000] ctnetlink v0.93: registering with nfnetlink.
    [   14.932000] #########>> ei_open 3378: -2014085120 call work scheduler   FFFFFFBC:5C:4C:FFFFFFAA:FFFFFF93:23
    [   14.952000] Raeth v3.1 (Tasklet)
    [   14.960000] set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1
    [   14.976000] phy_free_head is 0xc08000!!!
    [   14.984000] phy_free_tail_phy is 0xc09ff0!!!
    [   14.992000] txd_pool=a0c10000 phy_txd_pool=00C10000
    [   15.000000] ei_local->skb_free start address is 0x87f3a6dc.
    [   15.012000] free_txd: 00c10010, ei_local->cpu_ptr: 00C10000
    [   15.024000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   15.032000] ----------------+---------+--------
    [   15.040000]      0xa0c10000 0x00C10000 0x00C10000
    [   15.052000] 
    [   15.052000] phy_qrx_ring = 0x00c0a000, qrx_ring = 0xa0c0a000
    [   15.068000] 
    [   15.068000] phy_rx_ring0 = 0x00c0c000, rx_ring0 = 0xa0c0c000
    [   15.104000] MT7530 Reset Completed!!
    [   15.116000] change HW-TRAP to 0x117c8f
    [   15.124000] set LAN/WAN WLLLL
    [   15.136000] GMAC1_MAC_ADRH -- : 0x0000bc5c
    [   15.144000] GMAC1_MAC_ADRL -- : 0x4caa9323
    [   15.152000] GDMA2_MAC_ADRH -- : 0x0000bc5c
    [   15.160000] GDMA2_MAC_ADRL -- : 0x4caa9324
    [   15.168000] eth3: ===> VirtualIF_open
    [   15.176000] MT7621 GE2 link rate to 1G
    [   15.184000] CDMA_CSG_CFG = 81000000
    [   15.192000] GDMA1_FWD_CFG = 20710000
    [   15.196000] GDMA2_FWD_CFG = 20710000
    [   15.204000] #########>> int_gpio_workqueue 3335: return 0[   15.224000] eth3: ===> VirtualIF_open
    [   16.380000] IPv6: ADDRCONF(NETDEV_UP): lo: link is not ready
    [   16.392000] eth3: ===> VirtualIF_close
    [   16.400000] IPv6: ADDRCONF(NETDEV_UP): eth3: link is not ready
    
    [   16.420000] ra2880stop()...Done
    [   16.424000] eth3: ===> VirtualIF_close
    [   16.436000] Free TX/RX Ring Memory!
    [   16.444000] IPv6: ADDRCONF(NETDEV_UP): eth2: link is not ready
    [   16.460000] #########>> ei_open 3378: -2014085120 call work scheduler   FFFFFFBC:5C:4C:FFFFFFAA:FFFFFF93:23
    [   16.480000] Raeth v3.1 (Tasklet)
    [   16.488000] set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1
    [   16.504000] phy_free_head is 0xc08000!!!
    [   16.512000] phy_free_tail_phy is 0xc09ff0!!!
    [   16.520000] txd_pool=a0c10000 phy_txd_pool=00C10000
    [   16.528000] ei_local->skb_free start address is 0x87f3a6dc.
    [   16.540000] free_txd: 00c10010, ei_local->cpu_ptr: 00C10000
    [   16.552000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   16.560000] ----------------+---------+--------
    [   16.572000]      0xa0c10000 0x00C10000 0x00C10000
    [   16.580000] 
    [   16.580000] phy_qrx_ring = 0x00c0a000, qrx_ring = 0xa0c0a000
    [   16.596000] 
    [   16.596000] phy_rx_ring0 = 0x00c0c000, rx_ring0 = 0xa0c0c000
    [   16.632000] MT7530 Reset Completed!!
    [   16.644000] change HW-TRAP to 0x117c8f
    [   16.652000] set LAN/WAN WLLLL
    [   16.664000] GMAC1_MAC_ADRH -- : 0x0000bc5c
    [   16.672000] GMAC1_MAC_ADRL -- : 0x4caa9323
    [   16.680000] eth3: ===> VirtualIF_open
    [   16.688000] MT7621 GE2 link rate to 1G
    [   16.688000] CDMA_CSG_CFG = 81000000
    [   16.688000] GDMA1_FWD_CFG = 20710000
    [   16.688000] GDMA2_FWD_CFG = 20710000
    [   16.688000] device eth2 entered promiscuous mode
    [   16.688000] br-lan: port 1(eth2) entered forwarding state
    [   16.688000] br-lan: port 1(eth2) entered forwarding state
    [   16.688000] eth3: ===> VirtualIF_open
    [   18.696000] br-lan: port 1(eth2) entered forwarding state
    [   19.620000] [LOG]|WIRE| LAN - Port4 Link UP
    [   16.688000] #########>> int_gpio_workqueue 3335: return 0KERNEL_PANIC_COUNT=
    dnsmasq
    dnsmasq [br-lan]
    [   25.952000] mt_wifi: module license 'Proprietary' taints kernel.
    [   25.964000] Disabling lock debugging due to kernel taint
    [   26.076000] register mt_drv
    [   26.096000] pAd->PciHif.CSRBaseAddress =0xc1380000, csr_addr=0xc1380000!
    [   26.108000] DriverOwn()::Try to Clear FW Own...
    [   26.472000] DriverOwn()::Success to clear FW Own
    [   26.484000] ChipOpsMCUHook
    [   26.516000] pAd->PciHif.CSRBaseAddress =0xc1980000, csr_addr=0xc1980000!
    [   26.528000] DriverOwn()::Try to Clear FW Own...
    [   26.884000] DriverOwn()::Success to clear FW Own
    [   26.892000] ChipOpsMCUHook
    UHTTP crt Checked
    main init
    main init
    page=[/setup/index.html]
    count=[43]
    page=[/setup/index.html]
    count=[43]
    ip6d.c[94] XXXXXXXXXXX  Starting ip6d  XXXXXXXXXXXX
    firewall.c[563] Start IPv6 Firewall
    firewall.c[831] flush_ip6tables
    route.c[33] Start IPv6 Static Routing
    wlan_wps.c:get_wifi_pin_code:132:ioctl error
    wlan_wps.c:get_wifi_pin_code:132:ioctl error
    [   33.612000] Ralink HW NAT Module Enabled
    [   33.624000] eth2 ifindex =2
    [   33.628000] eth3 ifindex =7
    ip6d.c[145] create IP6D_READY
    connect.c[168] XXX disconnect
    connect.c[227] IPv6 Link Local Mode
    connect.c[168] XXX disconnect
    [   37.820000] jffs2: notice: (3159) jffs2_build_xattr_subsystem: complete building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of xref (0 dead, 0 orphan) found.
    [   38.896000] jffs2: notice: (3232) jffs2_build_xattr_subsystem: complete building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of xref (0 dead, 0 orphan) found.
    [   39.844000] DriverOwn()::Return since already in Driver Own...
    [   39.860000] RT_CfgSetMacAddress : invalid length (0)
    [   39.880000] default ApCliAPSDCapable[0]=0
    [   39.888000] default ApCliAPSDCapable[1]=0
    [   39.916000] [PMF]Set_PMFMFPC_Proc:: apidx=0, Desired MFPC=0
    [   39.940000] AndesSendCmdMsg: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD
    [   40.016000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   40.040000] WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
    [   40.052000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   40.176000] WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
    [   40.188000] efuse_probe: efuse = 10000212
    start ddns
    [   40.748000] mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
    [   40.760000] mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
    [   40.776000] mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
    [   40.788000] RcRadioInit(): DbdcMode=0, ConcurrentBand=1
    [   40.800000] RcRadioInit(): pRadioCtrl=867d2434,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
    [   40.824000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   40.840000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   40.852000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   40.864000] MT7615BBPInit():BBP Initialization.....
    [   40.876000]  Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
    [   40.892000]  Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
    [   40.912000] MT7615BBPInit() todo 
    [   40.920000] mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200] 
    [   40.940000] mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   40.956000] MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0 
    [   40.976000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   41.304000] mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200] 
    [   41.320000] mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   41.340000] MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0 
    [   41.360000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   41.580000] mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200] 
    [   41.596000] mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   41.616000] MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0 
    [   41.636000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   41.884000] mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300] 
    [   41.900000] mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   41.920000] MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0 
    [   41.940000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   42.160000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   42.176000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   42.196000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   42.216000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   42.612000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   42.628000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   42.648000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   42.668000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   42.948000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   42.964000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   42.984000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   43.004000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   43.224000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   43.240000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   43.260000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   43.280000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   43.500000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   43.516000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   43.536000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   43.556000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   43.776000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   43.792000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   43.812000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   43.832000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   44.052000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   44.068000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   44.088000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   44.108000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   44.328000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 14,Channel = 4  
    [   44.348000] Current Channel is 4. DfsZeroWaitSupport=0
    [   44.356000] [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
    [   44.368000] [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
    [   44.380000] mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200] 
    [   44.400000] mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   44.420000] MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0 
    [   44.436000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   44.460000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   44.980000] mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200] 
    [   44.996000] mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   45.016000] MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0 
    [   45.036000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   45.056000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   45.400000] mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200] 
    [   45.416000] mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   45.436000] MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0 
    [   45.456000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   45.476000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.012000] mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300] 
    [   46.028000] mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   46.048000] MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0 
    [   46.068000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   46.088000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.396000] mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300] 
    [   46.412000] mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   46.432000] MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0 
    [   46.452000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   46.472000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   46.996000] mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300] 
    [   47.012000] mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   47.032000] MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0 
    [   47.052000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   47.072000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   47.380000] mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400] 
    [   47.396000] mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   47.416000] MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0 
    [   47.436000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   47.456000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   47.960000] mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400] 
    [   47.976000] mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   47.996000] MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0 
    [   48.016000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   48.036000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   48.344000] mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400] 
    [   48.360000] mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8] 
    [   48.380000] MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0 
    [   48.400000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   48.420000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   48.868000] mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500] 
    [   48.884000] mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   48.904000] MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0 
    [   48.924000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   48.944000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   49.252000] mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500] 
    [   49.268000] mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0] 
    [   49.288000] MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0 
    [   49.308000] BW = 0,TXStream = 4, RXStream = 4, scan(1)
    [   49.328000] AP OBSS SYNC - BBP R4 to 20MHz.l
    [   49.636000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   49.636000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   49.788000] mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300] 
    [   49.808000] mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20] 
    [   49.828000] MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0 
    [   49.844000] BW = 0,TXStream = 4, RXStream = 4, scan(0)
    [   49.900000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   49.920000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   49.936000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   49.956000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   49.972000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   49.988000] wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw
    [   50.044000] red_is_enabled: set CR4/N9 RED Enable to 1.
    [   50.052000] cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
    [   50.064000] ***********dev->ifindex = 9
    [   50.132000] device ra0 entered promiscuous mode
    [   50.140000] br-lan: port 2(ra0) entered forwarding state
    [   50.152000] br-lan: port 2(ra0) entered forwarding state
    [   50.320000] DriverOwn()::Return since already in Driver Own...
    [   50.336000] RT_CfgSetMacAddress : invalid length (0)
    [   50.352000] default ApCliAPSDCapable[0]=0
    [   50.360000] default ApCliAPSDCapable[1]=0
    [   50.396000] [PMF]Set_PMFMFPC_Proc:: apidx=0, Desired MFPC=0
    [   50.416000] AndesSendCmdMsg: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD
    [   50.480000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   50.504000] WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
    [   50.516000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   50.640000] WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
    [   50.648000] efuse_probe: efuse = 10000212
    [   51.208000] mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
    [   51.220000] mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
    [   51.236000] mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
    [   51.248000] RcRadioInit(): DbdcMode=0, ConcurrentBand=1
    [   51.260000] RcRadioInit(): pRadioCtrl=84aaf434,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
    [   51.284000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   51.296000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   51.308000] CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
    [   51.320000] MT7615BBPInit():BBP Initialization.....
    [   51.332000]  Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
    [   51.348000]  Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
    [   51.368000] MT7615BBPInit() todo 
    [   51.376000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   51.396000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   51.416000] MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   51.432000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   51.796000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   51.812000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   51.832000] MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   51.852000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   52.072000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   52.088000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   52.108000] MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   52.128000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   52.156000] br-lan: port 2(ra0) entered forwarding state
    [   52.512000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   52.528000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   52.548000] MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0 
    [   52.568000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   52.844000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   52.860000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   52.880000] MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   52.900000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   53.120000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   53.136000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   53.156000] MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   53.176000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   53.396000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   53.412000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   53.432000] MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   53.452000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   53.788000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   53.804000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   53.824000] MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0 
    [   53.844000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   54.064000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   54.080000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   54.100000] MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   54.120000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   54.340000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   54.356000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   54.376000] MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   54.396000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   54.616000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   54.632000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   54.652000] MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   54.672000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   54.952000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   54.968000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   54.988000] MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   55.008000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   55.228000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   55.244000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   55.264000] MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   55.284000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   55.532000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   55.548000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   55.568000] MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   55.588000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   55.856000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   55.872000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   55.892000] MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   55.912000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   56.132000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   56.148000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   56.168000] MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0 
    [   56.188000] BW = 2,TXStream = 4, RXStream = 4, scan(1)
    [   56.500000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 49,Channel = 100  
    [   56.520000] Current Channel is 100. DfsZeroWaitSupport=0
    [   56.528000] [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
    [   56.540000] [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
    [   56.552000] wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
    [   56.552000]  LinkToOmacIdx = 0, LinkToWdevType = 1
    [   56.724000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   56.740000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   56.760000] MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0 
    [   56.780000] BW = 2,TXStream = 4, RXStream = 4, scan(0)
    [   56.876000] red_is_enabled: set CR4/N9 RED Enable to 1.
    [   56.888000] cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
    [   56.900000] ***********dev->ifindex = a
    [   56.964000] device rai0 entered promiscuous mode
    [   56.972000] br-lan: port 3(rai0) entered forwarding state
    [   56.984000] br-lan: port 3(rai0) entered forwarding state
    [   58.988000] br-lan: port 3(rai0) entered forwarding state
    [   59.056000] 
    [   59.056000]  Set_Led_Proc ==> arg = 00-00-00-00-02-00-00-00
    [   59.068000] 
    [   59.068000] Set_Led_Proc
    [   59.076000] 00
    [   59.080000] 00
    [   59.084000] 00
    [   59.088000] 00
    [   59.092000] 02
    [   59.096000] 00
    [   59.096000] 00
    [   59.100000] 00
    [   59.104000] AndesLedEnhanceOP: Success!
    [   59.136000] 
    [   59.136000]  Set_Led_Proc ==> arg = 00-00-00-00-02-00-00-00
    [   59.152000] 
    [   59.152000] Set_Led_Proc
    [   59.160000] 00
    [   59.164000] 00
    [   59.168000] 00
    [   59.172000] 00
    [   59.172000] 02
    [   59.176000] 00
    [   59.180000] 00
    [   59.184000] 00
    [   59.188000] AndesLedEnhanceOP: Success!
    FC start
    [   70.616000] u32 classifier
    [   70.620000]     Performance counters on
    [   70.628000]     Actions configured
    FC Disable
    

WN-AX1167GR

WN-GX300GRのサポート作業をした際、某氏から基板が共通のWN-AX1167GRについても色々と情報を頂いてある程度手を加えたため、どうせならということでこちらも購入して作業開始。
内部は基本的な設計が共通のため、同じ部分が多い。

U-Boot

Kernel

WRC-1167GHBK2-S

ETG3-Rと同時に、事前にファーム解析でMT7621であることを把握していたWRC-1167GHBK2-Sを同じく中古で購入したのでメモ。
なお、末尾 -I/-C はMT7620の模様。

U-Boot

  • help
    MT7621 # help
    ?       - alias for 'help'
    bootm   - boot application image from memory
    cp      - memory copy
    erase   - erase SPI FLASH memory
    go      - start application at address 'addr'
    help    - print online help
    loadb   - load binary file over serial line (kermit mode)
    md      - memory display
    mdio   - Ralink PHY register R/W command !!
    mm      - memory modify (auto-incrementing)
    nm      - memory modify (constant address)
    printenv- print environment variables
    reset   - Perform RESET of the CPU
    rf      - read/write rf register
    saveenv - save environment variables to persistent storage
    setenv  - set environment variables
    spi     - spi command
    tftpboot- boot image via network using TFTP protocol
    version - print monitor version
    

  • version
    MT7621 # version
    
    U-Boot 1.1.3 (Jan 23 2017 - 20:06:24)
    

  • printenv
    MT7621 # printenv
    bootcmd=tftp
    baudrate=57600
    ethaddr="00:AA:BB:CC:DD:10"
    ipaddr=192.168.1.1
    serverip=192.168.1.2
    bootdelay=2
    board_id=2017B2442642
    lan_mac=BC:5C:4C:BF:EF:29
    wan_mac=BC:5C:4C:BF:EF:28
    wlan0_ssid=elecom2g-bfef29
    wlan1_ssid=elecom5g-bfef29
    wlan0_psk_pass_phrase=************
    wlan1_psk_pass_phrase=************
    wps_pin=80909507
    hw_version=A1
    wlan0_domain=0x41
    stdin=serial
    stdout=serial
    stderr=serial
    BootType=3
    
    Environment size: 407/4092 bytes
    

Kernel

  • uname -a
    root@WRC-1167GHBK2-S:/# uname -a
    Linux WRC-1167GHBK2-S 3.10.14+ #29 SMP Tue Jun 27 10:24:06 CST 2017 mips GNU/Linux
    

  • cat /proc/version
    root@WRC-1167GHBK2-S:/# cat /proc/version
    Linux version 3.10.14+ (*****@ubuntu14) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #29 SMP Tue Jun 27 10:24:06 CST 2017
    

  • cat /proc/cpuinfo
    root@WRC-1167GHBK2-S:/# cat /proc/cpuinfo
    system type             : MT7621
    machine                 : Unknown
    processor               : 0
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 1
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 0
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 2
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 0
    VCED exceptions         : not available
    VCEI exceptions         : not available
    
    processor               : 3
    cpu model               : MIPS 1004Kc V2.15
    BogoMIPS                : 583.68
    wait instruction        : yes
    microsecond timers      : yes
    tlb_entries             : 32
    extra interrupt vector  : yes
    hardware watchpoint     : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
    isa                     : mips1 mips2 mips32r1 mips32r2
    ASEs implemented        : mips16 dsp mt
    shadow register sets    : 1
    kscratch registers      : 0
    core                    : 1
    VPE                     : 1
    VCED exceptions         : not available
    VCEI exceptions         : not available
    

  • cat /proc/meminfo
    root@WRC-1167GHBK2-S:/# cat /proc/meminfo 
    MemTotal:         124868 kB
    MemFree:           73740 kB
    Buffers:               0 kB
    Cached:            23124 kB
    SwapCached:            0 kB
    Active:            11352 kB
    Inactive:          14088 kB
    Active(anon):       2360 kB
    Inactive(anon):       68 kB
    Active(file):       8992 kB
    Inactive(file):    14020 kB
    Unevictable:           0 kB
    Mlocked:               0 kB
    SwapTotal:             0 kB
    SwapFree:              0 kB
    Dirty:                 0 kB
    Writeback:             0 kB
    AnonPages:          2372 kB
    Mapped:             1328 kB
    Shmem:               112 kB
    Slab:              11688 kB
    SReclaimable:       1560 kB
    SUnreclaim:        10128 kB
    KernelStack:         616 kB
    PageTables:          344 kB
    NFS_Unstable:          0 kB
    Bounce:                0 kB
    WritebackTmp:          0 kB
    CommitLimit:       62432 kB
    Committed_AS:       6788 kB
    VmallocTotal:    1048372 kB
    VmallocUsed:       10640 kB
    VmallocChunk:     991012 kB
    

  • cat /proc/mtd
    root@WRC-1167GHBK2-S:/# cat /proc/mtd
    dev:    size   erasesize  name
    mtd0: 01000000 00010000 "ALL"
    mtd1: 00030000 00010000 "Bootloader"
    mtd2: 00010000 00010000 "Config"
    mtd3: 00010000 00010000 "Factory"
    mtd4: 00f20000 00010000 "firmware"
    mtd5: 00871e35 00010000 "rootfs"
    mtd6: 00080000 00010000 "rootfs_data"
    mtd7: 00010000 00010000 "NVRAM"
    

  • bootlog
    ===================================================================
                    MT7621   stage1 code 10:33:55 (ASIC)
                    CPU=500000000 HZ BUS=166666666 HZ
    ==================================================================
    Change MPLL source from XTAL to CR...
    do MEMPLL setting..
    MEMPLL Config : 0x11100000
    3PLL mode + External loopback
    === XTAL-40Mhz === DDR-1200Mhz ===
    PLL3 FB_DL: 0x12, 1/0 = 719/305 49000000
    PLL4 FB_DL: 0x18, 1/0 = 679/345 61000000
    PLL2 FB_DL: 0x1a, 1/0 = 625/399 69000000
    do DDR setting..[01F40000]
    Apply DDR3 Setting...(use customer AC)
              0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
          --------------------------------------------------------------------------------
    0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    000E:|    0    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1
    000F:|    0    0    0    0    0    1    1    1    1    1    1    1    1    1    1    1
    0010:|    1    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0
    0011:|    1    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0
    0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
    rank 0 coarse = 15
    rank 0 fine = 80
    B:|    0    0    0    0    0    0    0    0    1    1    1    0    0    0    0    0
    opt_dle value:9
    DRAMC_R0DELDLY[018]=00002121
    ==================================================================
                    RX      DQS perbit delay software calibration 
    ==================================================================
    1.0-15 bit dq delay value
    ==================================================================
    bit|     0  1  2  3  4  5  6  7  8  9
    --------------------------------------
    0 |    11 11 13 13 11 11 13 8 7 10 
    10 |    9 11 10 12 10 11 
    --------------------------------------
    
    ==================================================================
    2.dqs window
    x=pass dqs delay value (min~max)center 
    y=0-7bit DQ of every group
    input delay:DQS0 =33 DQS1 = 33
    ==================================================================
    bit     DQS0     bit      DQS1
    0  (1~62)31  8  (1~62)31
    1  (1~62)31  9  (1~60)30
    2  (1~63)32  10  (1~63)32
    3  (1~66)33  11  (2~60)31
    4  (1~64)32  12  (1~64)32
    5  (1~65)33  13  (1~62)31
    6  (1~65)33  14  (1~66)33
    7  (1~64)32  15  (1~63)32
    ==================================================================
    3.dq delay value last
    ==================================================================
    bit|    0  1  2  3  4  5  6  7  8   9
    --------------------------------------
    0 |    13 13 14 13 12 11 13 9 9 13 
    10 |    10 13 11 14 10 12 
    ==================================================================
    ==================================================================
         TX  perbyte calibration 
    ==================================================================
    DQS loop = 15, cmp_err_1 = ffff0000 
    dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
    dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
    DQ loop=15, cmp_err_1 = ffff05aa
    DQ loop=14, cmp_err_1 = ffff01a2
    DQ loop=13, cmp_err_1 = ffff0182
    DQ loop=12, cmp_err_1 = ffff0000
    dqs_perbyte_dly.last_dqdly_pass[0]=12,  finish count=1 
    dqs_perbyte_dly.last_dqdly_pass[1]=12,  finish count=2 
    byte:0, (DQS,DQ)=(9,8)
    byte:1, (DQS,DQ)=(9,8)
    20,data:99
    [EMI] DRAMC calibration passed
    
    ===================================================================
                    MT7621   stage1 code done 
                    CPU=500000000 HZ BUS=166666666 HZ
    ===================================================================
    
    
    U-Boot 1.1.3 (Jan 23 2017 - 20:06:24)
    
    Board: Ralink APSoC DRAM:  128 MB
    relocate_code Pointer at: 87fb8000
    
    Config XHCI 40M PLL 
    flash manufacture id: ef, device id 40 18
    find flash: W25Q128BV
    ============================================ 
    Ralink UBoot Version: 5.0.0.0
    -------------------------------------------- 
    ASIC MT7621A DualCore (MAC to MT7530 Mode)
    DRAM_CONF_FROM: Auto-Detection 
    DRAM_TYPE: DDR3 
    DRAM bus: 16 bit
    Xtal Mode=3 OCP Ratio=1/3
    Flash component: SPI Flash
    Date:Jan 23 2017  Time:20:06:24
    ============================================ 
    icache: sets:256, ways:4, linesz:32 ,total:32768
    dcache: sets:256, ways:4, linesz:32 ,total:32768 
    
     ##### The CPU freq = 880 MHZ #### 
     estimate memory size =128 Mbytes
    #Reset_MT7530
    set LAN/WAN WLLLL
    
    Please choose the operation: 
       1: Load system code to SDRAM via TFTP. 
       2: Load system code then write to Flash via TFTP. 
       3: Boot system code via Flash (default).
       4: Entr boot command line interface.
       7: Load Boot Loader code then write to Flash via Serial. 
       9: Load Boot Loader code then write to Flash via TFTP. 
    default: 3
                                                                                                                               1 
    You choosed 3
    
                                                                                                                               0 
       
    3: System Boot system code via Flash.
    ## Booting image at bc050000 ...
       Image Name:   MIPS OpenWrt Linux-3.10
       Image Type:   MIPS Linux Kernel Image (lzma compressed)
       Data Size:    7004555 Bytes =  6.7 MB
       Load Address: 81001000
       Entry Point:  813b2650
       Verifying Checksum ... OK
       Uncompressing Kernel Image ... OK
    No initrd
    ## Transferring control to Linux (at address 813b2650) ...
    ## Giving linux memsize in MB, 128
    
    Starting kernel ...
    
    
    LINUX started...
    
     THIS IS ASIC
    
    SDK 5.0.S.0
    [    0.000000] Linux version 3.10.14+ (*********@ubuntu14) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #29 SMP Tue Jun 27 10:24:06 CST 2017
    [    0.000000] 
    [    0.000000]  The CPU feqenuce set to 880 MHz
    [    0.000000] GCMP present
    [    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
    [    0.000000] Software DMA cache coherency
    [    0.000000] Determined physical RAM map:
    [    0.000000]  memory: 08000000 @ 00000000 (usable)
    [    0.000000] Initrd not found or empty - disabling initrd
    [    0.000000] Zone ranges:
    [    0.000000]   DMA      [mem 0x00000000-0x00ffffff]
    [    0.000000]   Normal   [mem 0x01000000-0x07ffffff]
    [    0.000000] Movable zone start for each node
    [    0.000000] Early memory node ranges
    [    0.000000]   node   0: [mem 0x00000000-0x07ffffff]
    [    0.000000] Detected 3 available secondary CPU(s)
    [    0.000000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.000000] PERCPU: Embedded 7 pages/cpu @81b17000 s6592 r8192 d13888 u32768
    [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32512
    [    0.000000] Kernel command line: console=ttyS1,57600n8 root=/dev/ram0
    [    0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
    [    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
    [    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
    [    0.000000] Writing ErrCtl register=0001264d
    [    0.000000] Readback ErrCtl register=0001264d
    [    0.000000] Memory: 119492k/131072k available (3819k kernel code, 11580k reserved, 911k data, 5376k init, 0k highmem)
    [    0.000000] Hierarchical RCU implementation.
    [    0.000000] NR_IRQS:128
    [    0.000000] console [ttyS1] enabled
    [    0.120000] Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
    [    0.160000] pid_max: default: 32768 minimum: 301
    [    0.164000] Mount-cache hash table entries: 512
    [    0.168000] launch: starting cpu1
    [    0.172000] launch: cpu1 gone!
    [    0.172000] CPU1 revision is: 0001992f (MIPS 1004Kc)
    [    0.172000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.172000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.172000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.204000] Synchronize counters for CPU 1: done.
    [    0.212000] launch: starting cpu2
    [    0.216000] launch: cpu2 gone!
    [    0.216000] CPU2 revision is: 0001992f (MIPS 1004Kc)
    [    0.216000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.216000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.216000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.248000] Synchronize counters for CPU 2: done.
    [    0.256000] launch: starting cpu3
    [    0.260000] launch: cpu3 gone!
    [    0.260000] CPU3 revision is: 0001992f (MIPS 1004Kc)
    [    0.260000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
    [    0.260000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
    [    0.260000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
    [    0.288000] Synchronize counters for CPU 3: done.
    [    0.296000] Brought up 4 CPUs
    [    0.300000] devtmpfs: initialized
    [    0.304000] NET: Registered protocol family 16
    [    0.600000] release PCIe RST: RALINK_RSTCTRL = 7000000
    [    0.604000] PCIE PHY initialize
    [    0.608000] ***** Xtal 40MHz *****
    [    0.612000] start MT7621 PCIe register access
    [    1.204000] RALINK_RSTCTRL = 7000000
    [    1.208000] RALINK_CLKCFG1 = 77ffeff8
    [    1.212000] 
    [    1.212000] *************** MT7621 PCIe RC mode *************
    [    1.708000] PCIE1 no card, disable it(RST&CLK)
    [    1.712000] PCIE2 no card, disable it(RST&CLK)
    [    1.716000] pcie_link status = 0x1
    [    1.720000] RALINK_RSTCTRL= 1000000
    [    1.724000] *** Configure Device number setting of Virtual PCI-PCI bridge ***
    [    1.728000] RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
    [    1.732000] PCIE0 enabled
    [    1.736000] interrupt enable status: 100000
    [    1.740000] Port 0 N_FTS = 1b105000
    [    1.744000] config reg done
    [    1.748000] init_rt2880pci done
    [    1.752000] bio: create slab  at 0
    [    1.756000] SCSI subsystem initialized
    [    1.760000] PCI host bridge to bus 0000:00
    [    1.764000] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
    [    1.768000] pci_bus 0000:00: root bus resource [io  0x1e160000-0x1e16ffff]
    [    1.772000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
    [    1.776000] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
    [    1.780000] pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
    [    1.784000] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
    [    1.788000] pci 0000:00:00.0: BAR 1: assigned [mem 0x60100000-0x6010ffff]
    [    1.792000] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
    [    1.796000] pci 0000:00:00.0: PCI bridge to [bus 01]
    [    1.800000] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
    [    1.804000] PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
    [    1.808000] BAR0 at slot 0 = 0
    [    1.812000] bus=0x0, slot = 0x0
    [    1.816000] res[0]->start = 0
    [    1.820000] res[0]->end = 0
    [    1.824000] res[1]->start = 60100000
    [    1.828000] res[1]->end = 6010ffff
    [    1.832000] res[2]->start = 0
    [    1.836000] res[2]->end = 0
    [    1.840000] res[3]->start = 0
    [    1.844000] res[3]->end = 0
    [    1.848000] res[4]->start = 0
    [    1.852000] res[4]->end = 0
    [    1.856000] res[5]->start = 0
    [    1.860000] res[5]->end = 0
    [    1.864000] bus=0x1, slot = 0x0, irq=0x4
    [    1.868000] res[0]->start = 60000000
    [    1.872000] res[0]->end = 600fffff
    [    1.876000] res[1]->start = 0
    [    1.880000] res[1]->end = 0
    [    1.884000] res[2]->start = 0
    [    1.888000] res[2]->end = 0
    [    1.892000] res[3]->start = 0
    [    1.896000] res[3]->end = 0
    [    1.900000] res[4]->start = 0
    [    1.904000] res[4]->end = 0
    [    1.908000] res[5]->start = 0
    [    1.912000] res[5]->end = 0
    [    1.916000] Switching to clocksource MIPS
    [    1.920000] NET: Registered protocol family 2
    [    1.928000] TCP established hash table entries: 1024 (order: 1, 8192 bytes)
    [    1.944000] TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
    [    1.956000] TCP: Hash tables configured (established 1024 bind 1024)
    [    1.968000] TCP: reno registered
    [    1.976000] UDP hash table entries: 256 (order: 1, 8192 bytes)
    [    1.988000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
    [    2.000000] NET: Registered protocol family 1
    [    2.008000] RPC: Registered named UNIX socket transport module.
    [    2.020000] RPC: Registered udp transport module.
    [    2.028000] RPC: Registered tcp transport module.
    [    2.040000] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    6.692000] 4 CPUs re-calibrate udelay(lpj = 1167360)
    [    6.700000] jffs2: version 2.2. (NAND) (SUMMARY)  (ZLIB) (LZMA) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
    [    6.724000] io scheduler noop registered (default)
    [    6.732000] reg_int_mask=0, INT_MASK= 0 
    [    6.740000] HSDMA_init
    [    6.744000] 
    [    6.744000]  hsdma_phy_tx_ring0 = 0x00c00000, hsdma_tx_ring0 = 0xa0c00000
    [    6.764000] 
    [    6.764000]  hsdma_phy_rx_ring0 = 0x00c04000, hsdma_rx_ring0 = 0xa0c04000
    [    6.780000] TX_CTX_IDX0 = 0
    [    6.784000] TX_DTX_IDX0 = 0
    [    6.788000] RX_CRX_IDX0 = 3ff
    [    6.796000] RX_DRX_IDX0 = 0
    [    6.800000] set_fe_HSDMA_glo_cfg
    [    6.808000] HSDMA_GLO_CFG = 465
    [    6.816000] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
    [    6.828000] serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
    [    6.844000] serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
    [    6.856000] Ralink gpio driver initialized
    [    6.868000] brd: module loaded
    [    6.876000] flash manufacture id: ef, device id 40 18
    [    6.884000] W25Q128BV(ef 40180000) (16384 Kbytes)
    [    6.896000] mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
    [    6.916000] Creating 7 MTD partitions on "raspi":
    [    6.924000] 0x000000000000-0x000001000000 : "ALL"
    [    6.936000] 0x000000000000-0x000000030000 : "Bootloader"
    [    6.944000] 0x000000030000-0x000000040000 : "Config"
    [    6.956000] 0x000000040000-0x000000050000 : "Factory"
    [    6.968000] 0x000000050000-0x000000f70000 : "firmware"
    [    6.976000] 0x0000006fe1cb-0x000000f70000 : "rootfs"
    [    6.988000] mtd: partition "rootfs" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
    [    7.012000] mtdsplit: no squashfs found in "raspi"
    [    7.024000] 0x000000f70000-0x000000ff0000 : "rootfs_data"
    [    7.036000] 0x000000ff0000-0x000001000000 : "NVRAM"
    [    7.044000] tun: Universal TUN/TAP device driver, 1.6
    [    7.056000] tun: (C) 1999-2004 Max Krasnyansky 
    [    7.068000] PPP generic driver version 2.4.2
    [    7.076000] PPP BSD Compression module registered
    [    7.084000] PPP MPPE Compression module registered
    [    7.096000] NET: Registered protocol family 24
    [    7.104000] PPTP driver version 0.8.5
    [    7.112000] rdm_major = 253
    [    7.116000] GMAC1_MAC_ADRH -- : 0x0000bc5c
    [    7.124000] GMAC1_MAC_ADRL -- : 0x4cbfef29
    [    7.132000] Ralink APSoC Ethernet Driver Initilization. v3.1  1024 rx/tx descriptors allocated, mtu = 1500!
    [    7.152000] GMAC1_MAC_ADRH -- : 0x0000bc5c
    [    7.160000] GMAC1_MAC_ADRL -- : 0x4cbfef29
    [    7.168000] PROC INIT OK!
    [    7.176000] nf_conntrack version 0.5.0 (1867 buckets, 7468 max)
    [    7.188000] gre: GRE over IPv4 demultiplexor driver
    [    7.196000] ip_tables: (C) 2000-2006 Netfilter Core Team
    [    7.208000] Type=Restricted Cone
    [    7.212000] TCP: cubic registered
    [    7.220000] NET: Registered protocol family 10
    [    7.228000] sit: IPv6 over IPv4 tunneling driver
    [    7.240000] NET: Registered protocol family 17
    [    7.248000] Bridge firewalling registered
    [    7.256000] Ebtables v2.0 registered
    [    7.264000] l2tp_core: L2TP core driver, V2.0
    [    7.272000] l2tp_ppp: PPPoL2TP kernel driver, V2.0
    [    7.280000] 8021q: 802.1Q VLAN Support v1.8
    [    7.308000] Freeing unused kernel memory: 5376K (814a0000 - 819e0000)
    [    7.472000] jffs2: notice: (77) jffs2_build_xattr_subsystem: complete building xattr subsystem, 1 of xdatum (1 unchecked, 0 orphan) and 18 of xref (0 dead, 0 orphan) found.
    - preinit -
    Press the [f] key and hit [enter] to enter failsafe mode
    - regular preinit -
    - init -
    
    Please press Enter to activate this console. [   13.408000] #########>> ei_open 3376: -2079653888 call work scheduler   FFFFFFBC:5C:4C:FFFFFFBF:FFFFFFEF:29
    [   13.428000] Raeth v3.1 (Tasklet)
    [   13.440000] set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1
    [   13.452000] phy_free_head is 0xc08000!!!
    [   13.460000] phy_free_tail_phy is 0xc09ff0!!!
    [   13.468000] txd_pool=a0c10000 phy_txd_pool=00C10000
    [   13.480000] ei_local->skb_free start address is 0x840b26dc.
    [   13.492000] free_txd: 00c10010, ei_local->cpu_ptr: 00C10000
    [   13.500000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR 
    [   13.512000] ----------------+---------+--------
    [   13.520000]      0xa0c10000 0x00C10000 0x00C10000
    [   13.528000] 
    [   13.528000] phy_qrx_ring = 0x00c0a000, qrx_ring = 0xa0c0a000
    [   13.544000] 
    [   13.544000] phy_rx_ring0 = 0x00c0c000, rx_ring0 = 0xa0c0c000
    [   13.580000] MT7530 Reset Completed!!
    [   13.592000] change HW-TRAP to 0x117c8f
    [   13.604000] set LAN/WAN WLLLL
    [   13.612000] GMAC1_MAC_ADRH -- : 0x0000bc5c
    [   13.620000] GMAC1_MAC_ADRL -- : 0x4cbfef29
    [   13.628000] GDMA2_MAC_ADRH -- : 0x0000bc5c
    [   13.636000] GDMA2_MAC_ADRL -- : 0x4cbfef28
    [   13.648000] eth3: ===> VirtualIF_open
    [   13.656000] MT7621 GE2 link rate to 1G
    [   13.668000] CDMA_CSG_CFG = 81000000
    [   13.676000] GDMA1_FWD_CFG = 20710000
    [   13.684000] GDMA2_FWD_CFG = 20710000
    [   13.692000] #########>> int_gpio_workqueue 3333: return 0[   13.692000] device eth2 entered promiscuous mode
    [   13.692000] br-lan: port 1(eth2) entered forwarding state
    [   13.692000] br-lan: port 1(eth2) entered forwarding state
    [   13.692000] eth3: ===> VirtualIF_open
    [   15.700000] br-lan: port 1(eth2) entered forwarding state
    [   16.400000] Ralink HW NAT Module Enabled
    [   16.412000] eth2 ifindex =2
    [   16.416000] eth3 ifindex =5
    
    
    [   30.020000] register mt_drv
    [   30.032000] 
    [   30.032000] 
    [   30.032000] === pAd = c2b01000, size = 3627568 ===
    [   30.032000] 
    [   30.052000] PciHif.CSRBaseAddress =0xc2a00000, csr_addr=0xc2a00000!
    [   30.084000] get_wdev_by_idx: invalid idx(0)
    [   30.092000] RTMPInitPCIeDevice():device_id=0x7615
    [   30.104000] DriverOwn()::Try to Clear FW Own...
    [   30.416000] DriverOwn()::Success to clear FW Own
    [   30.424000] mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
    [   30.436000] mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
    [   30.448000] RtmpChipOpsHook(493): Not support for HIF_MT yet! MACVersion=0x0
    [   30.460000] mt7615_init()-->
    [   30.468000] Use 1st iPAiLNA default bin.
    [   30.476000] Use 0st /etc_ro/wlan/MT7615E_EEPROM1.bin default bin.
    [   30.488000] rxq = c2e72634
    [   40.016000] ctl->ackq = c2e72640
    [   40.020000] ctl->kickq = c2e7264c
    [   40.028000] ctl->tx_doneq = c2e72658
    [   40.036000] ctl->rx_doneq = c2e72664
    [   40.044000] mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
    [   40.056000] mt7615_fw_prepare(2701): MT7615_E3, USE E3 patch and ram code binary image
    [   40.072000] AndesMTLoadRomMethodFwDlRing(1036), cap->rom_patch_len(10206)
    [   40.084000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   40.096000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   40.108000] 20161013140927a
    [   40.116000] 
    [   40.116000] platform = 
    [   40.124000] ALPS
    [   40.124000] hw/sw version = 
    [   40.132000] 8a108a10
    [   40.136000] patch version = 
    [   40.140000] 00000010
    [   40.148000] Patch SEM Status=2
    [   40.152000] MtCmdPatchSemGet:(ret = 0)
    [   40.160000] 
    [   40.160000] Patch is not ready && get semaphore success, SemStatus(2)
    [   40.176000] EventGenericEventHandler: CMD Success
    [   40.184000] MtCmdAddressLenReq:(ret = 0)
    [   40.192000] MtCmdPatchFinishReq
    [   40.212000] EventGenericEventHandler: CMD Success
    [   40.220000] Send checksum req..
    [   40.228000] Patch SEM Status=3
    [   40.232000] MtCmdPatchSemGet:(ret = 0)
    [   40.240000] 
    [   40.240000] Release patch semaphore, SemStatus(3)
    [   40.252000] AndesMTEraseRomPatch
    [   40.260000] WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
    [   40.272000] AndesMTLoadFwMethodFwDlRing(810), cap->fw_len(460360)
    [   40.284000] Build Date:_201701111925
    [   40.288000] Build Date:_201701111925
    [   40.296000] AndesRestartCheck: Current TOP_MISC2(0x1)
    [   40.308000] AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
    [   40.320000] EventGenericEventHandler: CMD Success
    [   40.332000] MtCmdAddressLenReq:(ret = 0)
    [   40.344000] EventGenericEventHandler: CMD Success
    [   40.352000] MtCmdAddressLenReq:(ret = 0)
    [   40.360000] MtCmdFwStartReq: override = 1, address = 540672
    [   40.372000] EventGenericEventHandler: CMD Success
    [   40.380000] Build Date:_201612301011
    [   40.388000] EventGenericEventHandler: CMD Success
    [   40.396000] MtCmdAddressLenReq:(ret = 0)
    [   40.408000] MtCmdFwStartReq: override = 4, address = 0
    [   40.484000] EventGenericEventHandler: CMD Success
    [   40.520000] WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
    [   40.532000] MCU Init Done!
    [   40.540000]  MtCmdSetRlmPorCal: (ret = 0) 
    [   40.548000] efuse_probe: efuse = 10000212
    [   40.556000] RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
    [   40.568000] RtmpEepromGetDefault::e2p_dafault=1
    [   40.576000] RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
    [   40.592000] NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x0]
    [   40.604000] NICReadEEPROMParameters():Calling eeinit
    [   40.624000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   40.644000] MtCmdSetTxLpfCal:(ret = 0)
    [   40.652000] MtCmdSetTxIqCal:(ret = 0)
    [   40.660000] MtCmdSetTxDcCal:(ret = 0)
    [   40.668000] MtCmdSetRxFiCal:(ret = 0)
    [   40.672000] MtCmdSetRxFdCal:(ret = 0)
    [   40.680000] MtCmdSetRxFdCal:(ret = 0)
    [   40.688000] MtCmdSetRxFdCal:(ret = 0)
    [   40.696000] MtCmdSetRxFdCal:(ret = 0)
    [   40.704000] MtCmdSetRxFdCal:(ret = 0)
    [   40.712000] MtCmdSetRxFdCal:(ret = 0)
    [   40.716000] MtCmdSetRxFdCal:(ret = 0)
    [   40.724000] MtCmdSetRxFdCal:(ret = 0)
    [   40.732000] MtCmdSetRxFdCal:(ret = 0)
    [   40.740000] NICReadEEPROMParameters: EEPROM 0x52 b317
    [   41.304000] Country Region from e2p = 101
    [   41.312000] mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
    [   41.324000] mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
    [   41.340000] mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
    [   41.352000] rtmp_read_txpwr_from_eeprom(235): Don't Support this now!
    [   41.368000] RTMPReadTxPwrPerRate(1382): Don't Support this now!
    [   41.380000] RcRadioInit(): DbdcMode=1, ConcurrentBand=2
    [   41.388000] RcRadioInit(): pRadioCtrl=85c4344c,Band=0,rfcap=1,channel=1,PhyMode=2
    [   41.404000] RcRadioInit(): pRadioCtrl=85c43538,Band=1,rfcap=2,channel=36,PhyMode=1
    [   41.420000] MtCmdSetDbdcCtrl:(ret = 0)
    [   41.428000] Band Rf: 1, Phy Mode: 2
    [   41.432000] Band Rf: 2, Phy Mode: 1
    [   41.440000] AntCfgInit(2700): Not support for HIF_MT yet!
    [   41.452000] MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
    [   41.464000] MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
    [   41.476000] EEPROM Init Done!
    [   41.480000] mt_mac_init()-->
    [   41.488000] mt_mac_pse_init(2716): Don't Support this now!
    [   41.500000] mt7615_init_mac_cr()-->
    [   41.504000] mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
    [   41.516000] mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
    [   41.528000] MtAsicSetMacMaxLen(1290): Not finish Yet!
    [   41.536000] 
    [   41.700000] MtCmdSetMacTxRx:(ret = 0)
    [   41.708000] MtCmdSetMacTxRx:(ret = 0)
    [   41.716000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   41.728000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   41.744000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   41.756000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   41.772000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   41.784000] MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   41.800000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   42.036000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   42.044000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   42.064000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   42.072000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   42.092000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   42.100000] MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   42.120000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   42.352000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   42.360000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   42.380000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   42.388000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   42.408000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   42.416000] MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   42.436000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   42.668000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   42.676000] mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210]  offset [1900] 
    [   42.696000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   42.704000] mt7615_apply_dpd() : reload Central CH [42] BW [2] from cetral freq [5220] i[9] offset [2d98] 
    [   42.724000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   42.732000] MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 42 DBDCIdx= 1, Band= 0 
    [   42.752000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   43.076000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   43.084000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   43.104000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.112000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   43.132000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.140000] MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   43.160000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   43.392000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   43.400000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   43.420000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.428000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   43.448000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.456000] MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   43.476000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   43.708000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   43.716000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   43.736000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   43.744000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   43.764000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   43.772000] MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   43.792000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   44.024000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   44.032000] mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290]  offset [1a00] 
    [   44.052000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.060000] mt7615_apply_dpd() : reload Central CH [58] BW [2] from cetral freq [5300] i[13] offset [30f8] 
    [   44.080000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.088000] MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 58 DBDCIdx= 1, Band= 0 
    [   44.108000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   44.368000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   44.376000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   44.396000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.404000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   44.424000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.432000] MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   44.452000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   44.688000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   44.696000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   44.716000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   44.724000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   44.744000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   44.752000] MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   44.772000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   45.032000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   45.040000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   45.060000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.068000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   45.088000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.096000] MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   45.116000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   45.348000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   45.356000] mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530]  offset [1d00] 
    [   45.376000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.384000] mt7615_apply_dpd() : reload Central CH [106] BW [2] from cetral freq [5540] i[25] offset [3b18] 
    [   45.404000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.412000] MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 106 DBDCIdx= 1, Band= 0 
    [   45.432000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   45.664000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   45.672000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   45.692000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   45.700000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   45.720000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   45.728000] MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   45.748000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   45.988000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   45.996000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   46.016000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.024000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   46.044000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.052000] MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   46.072000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   46.304000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   46.312000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   46.332000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.340000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   46.360000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.368000] MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   46.388000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   46.620000] [DfsSwitchCheck]: DFS ByPass TX calibration.
    [   46.628000] mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610]  offset [1e00] 
    [   46.648000] MtCmdGetRXDCOCCalResult:(ret = 0)
    [   46.656000] mt7615_apply_dpd() : reload Central CH [122] BW [2] from cetral freq [5620] i[29] offset [3e78] 
    [   46.676000] MtCmdGetTXDPDCalResult:(ret = 0)
    [   46.684000] MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 122 DBDCIdx= 1, Band= 0 
    [   46.704000] BW = 2,TXStream = 2, RXStream = 2, scan(1)
    [   47.020000] ====================================================================
    [   47.032000] Channel  36 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.048000] Channel  40 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.064000] Channel  44 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.076000] Channel  48 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.092000] Channel  52 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.108000] Channel  56 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.120000] Channel  60 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.136000] Channel  64 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.152000] Channel 100 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.164000] Channel 104 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.180000] Channel 108 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.196000] Channel 112 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.208000] Channel 116 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.224000] Channel 120 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.240000] Channel 124 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.252000] Channel 128 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
    [   47.268000] ====================================================================
    [   47.284000] Rule 3 Channel Busy time value : Select Primary Channel 36 
    [   47.296000] Rule 3 Channel Busy time value : Min Channel Busy = 0
    [   47.308000] Rule 3 Channel Busy time value : BW = 80
    [   47.320000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 49,Channel = 36  
    [   47.340000]  AutoChSelUpdateChannel(): Update channel for wdev1 for this band PhyMode = 49,Channel = 36  
    [   47.360000]  AutoChSelUpdateChannel(): Update channel for wdev2 for this band PhyMode = 49,Channel = 36  
    [   47.380000]  AutoChSelUpdateChannel(): Update channel for wdev3 for this band PhyMode = 14,Channel = 0  
    [   47.400000]  AutoChSelUpdateChannel(): Update channel for wdev4 for this band PhyMode = 14,Channel = 0  
    [   47.420000]  AutoChSelUpdateChannel(): Update channel for wdev5 for this band PhyMode = 14,Channel = 0  
    [   47.440000] ====================================================================
    [   47.456000] ====================================================================
    [   47.468000] RandomByte2(4915): Not support for HIF_MT yet!
    [   47.480000]  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 49,Channel = 36  
    [   47.500000]  AutoChSelUpdateChannel(): Update channel for wdev1 for this band PhyMode = 49,Channel = 36  
    [   47.520000]  AutoChSelUpdateChannel(): Update channel for wdev2 for this band PhyMode = 49,Channel = 36  
    [   47.544000]  AutoChSelUpdateChannel(): Update channel for wdev3 for this band PhyMode = 14,Channel = 0  
    [   47.564000]  AutoChSelUpdateChannel(): Update channel for wdev4 for this band PhyMode = 14,Channel = 0  
    [   47.584000]  AutoChSelUpdateChannel(): Update channel for wdev5 for this band PhyMode = 14,Channel = 0  
    [   47.604000] ApAutoChannelAtBootUpifindex = 9
    [   49.312000] device rax0 entered promiscuous mode
    [   49.320000] br-lan: port 3(rax0) entered forwarding state
    [   49.332000] br-lan: port 3(rax0) entered forwarding state
    [   50.756000] br-lan: port 2(ra0) entered forwarding state
    [   51.336000] br-lan: port 3(rax0) entered forwarding state
    [   51.600000] Device Instance
    [   51.604000]  WDEV 00:
                    Name:ra0
    [   51.612000]          Wdev(list) Idx:0
    [   51.616000]           Idx:6
    [   51.620000] ***********dev->ifindex = 6
    [   51.628000]  WDEV 01:
                    Name:ra1
    [   51.636000]          Wdev(list) Idx:1
    [   51.640000]           Idx:7
    [   51.648000] ***********dev->ifindex = 7
    [   51.652000]  WDEV 02:
                    Name:ra2
    [   51.660000]          Wdev(list) Idx:2
    [   51.668000]           Idx:8
    [   51.672000] ***********dev->ifindex = 8
    [   51.680000]  WDEV 03:
                    Name:rax0
    [   51.684000]          Wdev(list) Idx:3
    [   51.692000]           Idx:9
    [   51.696000] ***********dev->ifindex = 9
    [   51.704000]  WDEV 04:
                    Name:rax1
    [   51.712000]          Wdev(list) Idx:4
    [   51.716000]           Idx:10
    [   51.720000] ***********dev->ifindex = a
    [   51.728000]  WDEV 05:
                    Name:rax2
    [   51.736000]          Wdev(list) Idx:5
    [   51.740000]           Idx:11
    [   51.744000] ***********dev->ifindex = b
    [   51.752000]  WDEV 06:
                    Name:apcli0
    [   51.760000]          Wdev(list) Idx:6
    [   51.768000]           Idx:12
    [   51.772000] ***********dev->ifindex = c
    [   51.780000]  WDEV 07:
                    Name:apclix0
    [   51.788000]          Wdev(list) Idx:7
    [   51.792000]           Idx:13
    [   51.796000] ***********dev->ifindex = d
    [   51.804000]  WDEV 08:
    [   51.808000]  WDEV 09:
    [   51.812000]  WDEV 10:
    [   51.816000]  WDEV 11:
    [   51.824000]  WDEV 12:
    [   51.828000]  WDEV 13:
    [   51.832000]  WDEV 14:
    [   51.836000]  WDEV 15:
    [   51.840000]  WDEV 16:
    [   51.844000]  WDEV 17:
    Jun 22 17:22:44 crond[1812]: crond: crond (busybox 1.19.4) started, log level 5
    dnsmasq
    dnsmasq [br-lan]
    start ddns
    FC start
    [   59.992000] u32 classifier
    [   59.996000]     Performance counters on
    [   60.004000]     Actions configured
    FC Disable
    [   60.168000] write (/proc/ttl_ipmr) called 0
    [   60.288000] NF_TPROXY: Transparent proxy support initialized, version 4.1.0
    [   60.300000] NF_TPROXY: Copyright (c) 2006-2007 BalaBit IT Ltd.
    [   60.412000] exit_sys_init_handler
    [   60.420000] mykthread: successfully executed /sbin/wifi_mode application
    stop ddns
    start ddns
    
    
    
    BusyBox v1.19.4 (2017-06-22 22:52:51 CST) built-in shell (ash)
    Enter 'help' for a list of built-in commands.
    
         MM           NM                    MMMMMMM          M       M
       $MMMMM        MMMMM                MMMMMMMMMMM      MMM     MMM
      MMMMMMMM     MM MMMMM.              MMMMM:MMMMMM:   MMMM   MMMMM
    MMMM= MMMMMM  MMM   MMMM       MMMMM   MMMM  MMMMMM   MMMM  MMMMM'
    MMMM=  MMMMM MMMM    MM       MMMMM    MMMM    MMMM   MMMMNMMMMM
    MMMM=   MMMM  MMMMM          MMMMM     MMMM    MMMM   MMMMMMMM
    MMMM=   MMMM   MMMMMM       MMMMM      MMMM    MMMM   MMMMMMMMM
    MMMM=   MMMM     MMMMM,    NMMMMMMMM   MMMM    MMMM   MMMMMMMMMMM
    MMMM=   MMMM      MMMMMM   MMMMMMMM    MMMM    MMMM   MMMM  MMMMMM
    MMMM=   MMMM   MM    MMMM    MMMM      MMMM    MMMM   MMMM    MMMM
    MMMM$ ,MMMMM  MMMMM  MMMM    MMM       MMMM   MMMMM   MMMM    MMMM
      MMMMMMM:      MMMMMMM     M         MMMMMMMMMMMM  MMMMMMM MMMMMMM
        MMMMMM       MMMMN     M           MMMMMMMMM      MMMM    MMMM
         MMMM          M                    MMMMMMM        M       M
           M
     ---------------------------------------------------------------
       For those about to rock... (Attitude Adjustment, r40021)
     ---------------------------------------------------------------
    root@WRC-1167GHBK2-S:/#